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ETISS 0.8.0
ExtendableTranslatingInstructionSetSimulator(version0.8.0)
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Go to the documentation of this file.
38 #define RISCV64_DEBUG_CALL 0
39 #define RISCV64_Pipeline1 0
40 #define RISCV64_Pipeline2 0
41 using namespace etiss ;
52 headers_.insert(
"Arch/RISCV64/RISCV64.h");
77 #if RISCV64_Pipeline1 || RISCV64_Pipeline2
88 for(
int i = 0; i < 9; i = i + 1){
95 for(
int i = 0; i < 32; i ++)
97 riscv64cpu->
ins_X[i] = 0;
98 riscv64cpu->
X[i] = & riscv64cpu->
ins_X[i];
102 riscv64cpu->
ZERO = 0;
103 riscv64cpu->
X[0] = & (riscv64cpu->
ZERO);
105 riscv64cpu->
X[1] = & (riscv64cpu->
RA);
107 riscv64cpu->
X[2] = & (riscv64cpu->
SP);
109 riscv64cpu->
X[3] = & (riscv64cpu->
GP);
111 riscv64cpu->
X[4] = & (riscv64cpu->
TP);
113 riscv64cpu->
X[5] = & (riscv64cpu->
T0);
115 riscv64cpu->
X[6] = & (riscv64cpu->
T1);
117 riscv64cpu->
X[7] = & (riscv64cpu->
T2);
119 riscv64cpu->
X[8] = & (riscv64cpu->
S0);
121 riscv64cpu->
X[9] = & (riscv64cpu->
S1);
123 riscv64cpu->
X[10] = & (riscv64cpu->
A0);
125 riscv64cpu->
X[11] = & (riscv64cpu->
A1);
127 riscv64cpu->
X[12] = & (riscv64cpu->
A2);
129 riscv64cpu->
X[13] = & (riscv64cpu->
A3);
131 riscv64cpu->
X[14] = & (riscv64cpu->
A4);
133 riscv64cpu->
X[15] = & (riscv64cpu->
A5);
135 riscv64cpu->
X[16] = & (riscv64cpu->
A6);
137 riscv64cpu->
X[17] = & (riscv64cpu->
A7);
139 riscv64cpu->
X[18] = & (riscv64cpu->
S2);
141 riscv64cpu->
X[19] = & (riscv64cpu->
S3);
143 riscv64cpu->
X[20] = & (riscv64cpu->
S4);
145 riscv64cpu->
X[21] = & (riscv64cpu->
S5);
147 riscv64cpu->
X[22] = & (riscv64cpu->
S6);
149 riscv64cpu->
X[23] = & (riscv64cpu->
S7);
151 riscv64cpu->
X[24] = & (riscv64cpu->
S8);
153 riscv64cpu->
X[25] = & (riscv64cpu->
S9);
155 riscv64cpu->
X[26] = & (riscv64cpu->
S10);
157 riscv64cpu->
X[27] = & (riscv64cpu->
S11);
159 riscv64cpu->
X[28] = & (riscv64cpu->
T3);
161 riscv64cpu->
X[29] = & (riscv64cpu->
T4);
163 riscv64cpu->
X[30] = & (riscv64cpu->
T5);
165 riscv64cpu->
X[31] = & (riscv64cpu->
T6);
166 for (
int i = 0; i<32 ;i++){
167 riscv64cpu->
F[i] = 0;
169 riscv64cpu->
FCSR = 0;
170 for (
int i = 0; i<4096 ;i++){
171 riscv64cpu->
CSR[i] = 0;
173 riscv64cpu->
CSR[0] = 15;
174 riscv64cpu->
CSR[256] = 15;
175 riscv64cpu->
CSR[768] = 15;
176 riscv64cpu->
CSR[260] = 4294967295;
177 riscv64cpu->
CSR[769] = 1315077;
178 riscv64cpu->
CSR[3088] = 3;
179 for (
int i = 0; i<4 ;i++){
180 riscv64cpu->
FENCE[i] = 0;
185 riscv64cpu->
CSR[0x304] = (0xFFFFFFFFFFFFFBBB);
187 riscv64cpu->
CSR[0x104] = riscv64cpu->
CSR[0x304] & (~(0x888));
189 riscv64cpu->
CSR[0x004] = riscv64cpu->
CSR[0x304] & (~(0xAAA));
224 cb.
fileglobalCode().insert(
"#include \"Arch/RISCV64/RISCV64.h\"\n");
306 partInit.
code() = std::string(
"//lui\n")+
307 "etiss_uint32 temp = 0;\n"
308 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
309 #if RISCV64_Pipeline1
310 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
311 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
312 "etiss_uint32 num_stages = 4;\n"
313 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
314 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
316 #if RISCV64_Pipeline2
317 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
318 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
319 "etiss_uint32 num_stages = 4;\n"
320 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
321 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
324 "etiss_int64 imm_extended = 0;\n"
326 "if((" +
toString(imm) +
" & 0x80000000)>>31 == 0)\n"
328 "imm_extended = 0;\n"
329 #if RISCV64_DEBUG_CALL
330 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
336 "imm_extended = 4294967295;\n"
337 #if RISCV64_DEBUG_CALL
338 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
340 "imm_extended = (imm_extended << 32);\n"
341 #if RISCV64_DEBUG_CALL
342 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
345 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
346 #if RISCV64_DEBUG_CALL
347 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
351 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = imm_extended;\n"
352 #if RISCV64_DEBUG_CALL
353 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
385 partInit.
code() = std::string(
"//auipc\n")+
386 "etiss_uint32 temp = 0;\n"
387 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
388 #if RISCV64_Pipeline1
389 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
390 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
391 "etiss_uint32 num_stages = 4;\n"
392 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
393 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
395 #if RISCV64_Pipeline2
396 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
397 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
398 "etiss_uint32 num_stages = 4;\n"
399 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
400 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
403 "etiss_int64 imm_extended = 0;\n"
405 "if((" +
toString(imm) +
" & 0x80000000)>>31 == 0)\n"
407 "imm_extended = 0;\n"
408 #if RISCV64_DEBUG_CALL
409 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
415 "imm_extended = 4294967295;\n"
416 #if RISCV64_DEBUG_CALL
417 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
419 "imm_extended = (imm_extended << 32);\n"
420 #if RISCV64_DEBUG_CALL
421 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
424 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
425 #if RISCV64_DEBUG_CALL
426 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
431 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
433 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
435 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0 + imm_extended;\n"
436 #if RISCV64_DEBUG_CALL
437 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
478 partInit.
code() = std::string(
"//jal\n")+
479 "etiss_uint32 temp = 0;\n"
480 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
481 #if RISCV64_Pipeline1
482 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
483 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
484 "etiss_uint32 num_stages = 4;\n"
485 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
486 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
488 #if RISCV64_Pipeline2
489 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
490 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
491 "etiss_uint32 num_stages = 4;\n"
492 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
493 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
496 "etiss_int64 imm_extended = 0;\n"
498 "if((" +
toString(imm) +
" & 0x100000)>>20 == 0)\n"
500 "imm_extended = 0;\n"
501 #if RISCV64_DEBUG_CALL
502 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
508 "imm_extended = 4294967295;\n"
509 #if RISCV64_DEBUG_CALL
510 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
512 "imm_extended = (imm_extended << 32);\n"
513 #if RISCV64_DEBUG_CALL
514 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
516 "imm_extended = imm_extended + 4292870144;\n"
517 #if RISCV64_DEBUG_CALL
518 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
521 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
522 #if RISCV64_DEBUG_CALL
523 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
528 #if RISCV64_DEBUG_CALL
529 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
539 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
541 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
543 "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n"
544 #if RISCV64_DEBUG_CALL
545 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
548 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
581 partInit.
code() = std::string(
"//jalr\n")+
582 "etiss_uint32 temp = 0;\n"
583 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
584 #if RISCV64_Pipeline1
585 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
586 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
587 "etiss_uint32 num_stages = 4;\n"
588 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
589 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
591 #if RISCV64_Pipeline2
592 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
593 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
594 "etiss_uint32 num_stages = 4;\n"
595 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
596 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
599 "etiss_int64 imm_extended = 0;\n"
600 "etiss_int64 new_pc = 0;\n"
602 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
604 "imm_extended = 0;\n"
605 #if RISCV64_DEBUG_CALL
606 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
612 "imm_extended = 4294967295;\n"
613 #if RISCV64_DEBUG_CALL
614 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
616 "imm_extended = (imm_extended << 32);\n"
617 #if RISCV64_DEBUG_CALL
618 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
620 "imm_extended = imm_extended + 4294963200;\n"
621 #if RISCV64_DEBUG_CALL
622 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
625 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
626 #if RISCV64_DEBUG_CALL
627 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
629 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
630 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
632 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
634 "new_pc = (etiss_int64)cast_0 + imm_extended;\n"
635 #if RISCV64_DEBUG_CALL
636 "printf(\"new_pc = %#lx\\n\",new_pc); \n"
641 #if RISCV64_DEBUG_CALL
642 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
651 "cpu->instructionPointer = (new_pc & ~1)&0xffffffffffffffff;\n"
652 #if RISCV64_DEBUG_CALL
653 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
656 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
698 partInit.
code() = std::string(
"//beq\n")+
699 "etiss_uint32 temp = 0;\n"
700 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
701 #if RISCV64_Pipeline1
702 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
703 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
704 "etiss_uint32 num_stages = 4;\n"
705 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
706 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
708 #if RISCV64_Pipeline2
709 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
710 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
711 "etiss_uint32 num_stages = 4;\n"
712 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
713 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
716 "etiss_int64 imm_extended = 0;\n"
717 "etiss_int64 choose1 = 0;\n"
719 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
721 "imm_extended = 0;\n"
722 #if RISCV64_DEBUG_CALL
723 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
729 "imm_extended = 4294967295;\n"
730 #if RISCV64_DEBUG_CALL
731 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
733 "imm_extended = (imm_extended << 32);\n"
734 #if RISCV64_DEBUG_CALL
735 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
737 "imm_extended = imm_extended + 4294959104;\n"
738 #if RISCV64_DEBUG_CALL
739 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
742 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
743 #if RISCV64_DEBUG_CALL
744 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
746 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] == *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
749 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
751 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
753 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
754 #if RISCV64_DEBUG_CALL
755 "printf(\"choose1 = %#lx\\n\",choose1); \n"
764 #if RISCV64_DEBUG_CALL
765 "printf(\"choose1 = %#lx\\n\",choose1); \n"
768 "cpu->instructionPointer = choose1;\n"
769 #if RISCV64_DEBUG_CALL
770 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
773 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
806 partInit.
code() = std::string(
"//lb\n")+
807 "etiss_uint32 exception = 0;\n"
808 "etiss_uint32 temp = 0;\n"
809 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
810 #if RISCV64_Pipeline1
811 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
812 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
813 "etiss_uint32 num_stages = 4;\n"
814 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
815 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
817 #if RISCV64_Pipeline2
818 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
819 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
820 "etiss_uint32 num_stages = 4;\n"
821 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
822 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
825 "etiss_int64 offs = 0;\n"
826 "etiss_int64 imm_extended = 0;\n"
828 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
830 "imm_extended = 0;\n"
831 #if RISCV64_DEBUG_CALL
832 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
838 "imm_extended = 4294967295;\n"
839 #if RISCV64_DEBUG_CALL
840 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
842 "imm_extended = (imm_extended << 32);\n"
843 #if RISCV64_DEBUG_CALL
844 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
846 "imm_extended = imm_extended + 4294963200;\n"
847 #if RISCV64_DEBUG_CALL
848 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
851 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
852 #if RISCV64_DEBUG_CALL
853 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
855 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
856 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
858 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
860 "offs = (etiss_int64)cast_0 + imm_extended;\n"
861 #if RISCV64_DEBUG_CALL
862 "printf(\"offs = %#lx\\n\",offs); \n"
866 "etiss_uint8 MEM_offs;\n"
867 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
868 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n"
869 "etiss_int8 cast_1 = MEM_offs; \n"
870 "if((etiss_int8)((etiss_uint8)cast_1 - 0x80) > 0x0)\n"
872 "cast_1 =0x0 + (etiss_uint8)cast_1 ;\n"
874 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
875 #if RISCV64_DEBUG_CALL
876 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
883 "return exception;\n"
917 partInit.
code() = std::string(
"//sb\n")+
918 "etiss_uint32 exception = 0;\n"
919 "etiss_uint32 temp = 0;\n"
920 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
921 #if RISCV64_Pipeline1
922 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
923 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
924 "etiss_uint32 num_stages = 4;\n"
925 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
926 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
928 #if RISCV64_Pipeline2
929 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
930 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
931 "etiss_uint32 num_stages = 4;\n"
932 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
933 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
936 "etiss_int64 offs = 0;\n"
937 "etiss_int64 imm_extended = 0;\n"
939 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
941 "imm_extended = 0;\n"
942 #if RISCV64_DEBUG_CALL
943 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
949 "imm_extended = 4294967295;\n"
950 #if RISCV64_DEBUG_CALL
951 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
953 "imm_extended = (imm_extended << 32);\n"
954 #if RISCV64_DEBUG_CALL
955 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
957 "imm_extended = imm_extended + 4294963200;\n"
958 #if RISCV64_DEBUG_CALL
959 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
962 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
963 #if RISCV64_DEBUG_CALL
964 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
966 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
967 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
969 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
971 "offs = (etiss_int64)cast_0 + imm_extended;\n"
972 #if RISCV64_DEBUG_CALL
973 "printf(\"offs = %#lx\\n\",offs); \n"
975 "etiss_uint8 MEM_offs;\n"
976 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
977 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
978 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,1);\n"
979 #if RISCV64_DEBUG_CALL
980 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
982 "if((offs + 1 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
984 "((RISCV64*)cpu)->RES = 0;\n"
985 #if RISCV64_DEBUG_CALL
986 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
993 "return exception;\n"
1024 partInit.
code() = std::string(
"//addi\n")+
1025 "etiss_uint32 temp = 0;\n"
1026 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1027 #if RISCV64_Pipeline1
1028 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1029 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1030 "etiss_uint32 num_stages = 4;\n"
1031 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1032 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1034 #if RISCV64_Pipeline2
1035 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1036 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1037 "etiss_uint32 num_stages = 4;\n"
1038 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1039 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1042 "etiss_int64 imm_extended = 0;\n"
1044 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1046 "imm_extended = 0;\n"
1047 #if RISCV64_DEBUG_CALL
1048 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1054 "imm_extended = 4294967295;\n"
1055 #if RISCV64_DEBUG_CALL
1056 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1058 "imm_extended = (imm_extended << 32);\n"
1059 #if RISCV64_DEBUG_CALL
1060 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1062 "imm_extended = imm_extended + 4294963200;\n"
1063 #if RISCV64_DEBUG_CALL
1064 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1067 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1068 #if RISCV64_DEBUG_CALL
1069 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1073 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
1074 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1076 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1078 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0 + imm_extended;\n"
1079 #if RISCV64_DEBUG_CALL
1080 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1117 partInit.
code() = std::string(
"//addiw\n")+
1118 "etiss_uint32 temp = 0;\n"
1119 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1120 #if RISCV64_Pipeline1
1121 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1122 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1123 "etiss_uint32 num_stages = 4;\n"
1124 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1125 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1127 #if RISCV64_Pipeline2
1128 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1129 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1130 "etiss_uint32 num_stages = 4;\n"
1131 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1132 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1135 "etiss_int64 imm_extended = 0;\n"
1136 "etiss_int32 res = 0;\n"
1138 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1140 "imm_extended = 0;\n"
1141 #if RISCV64_DEBUG_CALL
1142 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1148 "imm_extended = 4294967295;\n"
1149 #if RISCV64_DEBUG_CALL
1150 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1152 "imm_extended = (imm_extended << 32);\n"
1153 #if RISCV64_DEBUG_CALL
1154 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1156 "imm_extended = imm_extended + 4294963200;\n"
1157 #if RISCV64_DEBUG_CALL
1158 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1161 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1162 #if RISCV64_DEBUG_CALL
1163 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1167 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
1168 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1170 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1172 "res = (etiss_int32)cast_0 + imm_extended;\n"
1173 #if RISCV64_DEBUG_CALL
1174 "printf(\"res = %#x\\n\",res); \n"
1176 "etiss_int32 cast_1 = res; \n"
1177 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
1179 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
1181 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
1182 #if RISCV64_DEBUG_CALL
1183 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1229 partInit.
code() = std::string(
"//bne\n")+
1230 "etiss_uint32 temp = 0;\n"
1231 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1232 #if RISCV64_Pipeline1
1233 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1234 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1235 "etiss_uint32 num_stages = 4;\n"
1236 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1237 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1239 #if RISCV64_Pipeline2
1240 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1241 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1242 "etiss_uint32 num_stages = 4;\n"
1243 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1244 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1247 "etiss_int64 imm_extended = 0;\n"
1248 "etiss_int64 choose1 = 0;\n"
1250 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
1252 "imm_extended = 0;\n"
1253 #if RISCV64_DEBUG_CALL
1254 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1260 "imm_extended = 4294967295;\n"
1261 #if RISCV64_DEBUG_CALL
1262 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1264 "imm_extended = (imm_extended << 32);\n"
1265 #if RISCV64_DEBUG_CALL
1266 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1268 "imm_extended = imm_extended + 4294959104;\n"
1269 #if RISCV64_DEBUG_CALL
1270 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1273 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1274 #if RISCV64_DEBUG_CALL
1275 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1277 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] != *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
1280 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1282 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1284 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
1285 #if RISCV64_DEBUG_CALL
1286 "printf(\"choose1 = %#lx\\n\",choose1); \n"
1295 #if RISCV64_DEBUG_CALL
1296 "printf(\"choose1 = %#lx\\n\",choose1); \n"
1299 "cpu->instructionPointer = choose1;\n"
1300 #if RISCV64_DEBUG_CALL
1301 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
1304 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
1337 partInit.
code() = std::string(
"//lh\n")+
1338 "etiss_uint32 exception = 0;\n"
1339 "etiss_uint32 temp = 0;\n"
1340 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1341 #if RISCV64_Pipeline1
1342 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1343 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1344 "etiss_uint32 num_stages = 4;\n"
1345 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1346 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1348 #if RISCV64_Pipeline2
1349 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1350 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1351 "etiss_uint32 num_stages = 4;\n"
1352 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1353 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1356 "etiss_int64 offs = 0;\n"
1357 "etiss_int64 imm_extended = 0;\n"
1359 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1361 "imm_extended = 0;\n"
1362 #if RISCV64_DEBUG_CALL
1363 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1369 "imm_extended = 4294967295;\n"
1370 #if RISCV64_DEBUG_CALL
1371 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1373 "imm_extended = (imm_extended << 32);\n"
1374 #if RISCV64_DEBUG_CALL
1375 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1377 "imm_extended = imm_extended + 4294963200;\n"
1378 #if RISCV64_DEBUG_CALL
1379 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1382 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1383 #if RISCV64_DEBUG_CALL
1384 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1386 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
1387 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1389 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1391 "offs = (etiss_int64)cast_0 + imm_extended;\n"
1392 #if RISCV64_DEBUG_CALL
1393 "printf(\"offs = %#lx\\n\",offs); \n"
1397 "etiss_uint16 MEM_offs;\n"
1398 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
1399 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n"
1400 "etiss_int16 cast_1 = MEM_offs; \n"
1401 "if((etiss_int16)((etiss_uint16)cast_1 - 0x8000) > 0x0)\n"
1403 "cast_1 =0x0 + (etiss_uint16)cast_1 ;\n"
1405 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
1406 #if RISCV64_DEBUG_CALL
1407 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1414 "return exception;\n"
1448 partInit.
code() = std::string(
"//sh\n")+
1449 "etiss_uint32 exception = 0;\n"
1450 "etiss_uint32 temp = 0;\n"
1451 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1452 #if RISCV64_Pipeline1
1453 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1454 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1455 "etiss_uint32 num_stages = 4;\n"
1456 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1457 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1459 #if RISCV64_Pipeline2
1460 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1461 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1462 "etiss_uint32 num_stages = 4;\n"
1463 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1464 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1467 "etiss_int64 offs = 0;\n"
1468 "etiss_int64 imm_extended = 0;\n"
1470 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
1472 "imm_extended = 0;\n"
1473 #if RISCV64_DEBUG_CALL
1474 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1480 "imm_extended = 4294967295;\n"
1481 #if RISCV64_DEBUG_CALL
1482 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1484 "imm_extended = (imm_extended << 32);\n"
1485 #if RISCV64_DEBUG_CALL
1486 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1488 "imm_extended = imm_extended + 4294963200;\n"
1489 #if RISCV64_DEBUG_CALL
1490 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1493 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
1494 #if RISCV64_DEBUG_CALL
1495 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
1497 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
1498 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
1500 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
1502 "offs = (etiss_int64)cast_0 + imm_extended;\n"
1503 #if RISCV64_DEBUG_CALL
1504 "printf(\"offs = %#lx\\n\",offs); \n"
1506 "etiss_uint16 MEM_offs;\n"
1507 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
1508 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
1509 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,2);\n"
1510 #if RISCV64_DEBUG_CALL
1511 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
1513 "if((offs + 2 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
1515 "((RISCV64*)cpu)->RES = 0;\n"
1516 #if RISCV64_DEBUG_CALL
1517 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
1524 "return exception;\n"
1554 partInit.
code() = std::string(
"//fence_i\n")+
1555 "etiss_uint32 temp = 0;\n"
1556 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1557 #if RISCV64_Pipeline1
1558 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1559 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1560 "etiss_uint32 num_stages = 4;\n"
1561 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1562 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1564 #if RISCV64_Pipeline2
1565 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1566 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1567 "etiss_uint32 num_stages = 4;\n"
1568 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1569 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1573 "((RISCV64*)cpu)->FENCE[1] = " +
toString(imm) +
";\n"
1574 #if RISCV64_DEBUG_CALL
1575 "printf(\"((RISCV64*)cpu)->FENCE[1] = %#lx\\n\",((RISCV64*)cpu)->FENCE[1]); \n"
1610 partInit.
code() = std::string(
"//csrrw\n")+
1611 "etiss_uint32 temp = 0;\n"
1612 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1613 #if RISCV64_Pipeline1
1614 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1615 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1616 "etiss_uint32 num_stages = 4;\n"
1617 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1618 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1620 #if RISCV64_Pipeline2
1621 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1622 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1623 "etiss_uint32 num_stages = 4;\n"
1624 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1625 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1628 "etiss_int64 mAddr = 0;\n"
1629 "etiss_int64 writeMask = 0;\n"
1630 "etiss_int64 writeMaskU = 0;\n"
1631 "etiss_int64 sAddr = 0;\n"
1632 "etiss_int64 writeMaskS = 0;\n"
1633 "etiss_int64 uAddr = 0;\n"
1634 "etiss_uint64 rs_val = 0;\n"
1635 "etiss_uint64 csr_val = 0;\n"
1636 "etiss_int64 writeMaskM = 0;\n"
1638 "rs_val = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
1639 #if RISCV64_DEBUG_CALL
1640 "printf(\"rs_val = %#lx\\n\",rs_val); \n"
1644 "csr_val = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
1645 #if RISCV64_DEBUG_CALL
1646 "printf(\"csr_val = %#lx\\n\",csr_val); \n"
1651 #if RISCV64_DEBUG_CALL
1652 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1655 #if RISCV64_DEBUG_CALL
1656 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1659 #if RISCV64_DEBUG_CALL
1660 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1662 "writeMaskM = -9223372036846388805;\n"
1663 #if RISCV64_DEBUG_CALL
1664 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1666 "writeMaskS = -9223372036853866189;\n"
1667 #if RISCV64_DEBUG_CALL
1668 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1670 "writeMaskU = -9223372036853866479;\n"
1671 #if RISCV64_DEBUG_CALL
1672 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1679 #if RISCV64_DEBUG_CALL
1680 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1683 #if RISCV64_DEBUG_CALL
1684 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1687 #if RISCV64_DEBUG_CALL
1688 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1690 "writeMaskM = 3003;\n"
1691 #if RISCV64_DEBUG_CALL
1692 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1694 "writeMaskS = 819;\n"
1695 #if RISCV64_DEBUG_CALL
1696 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1698 "writeMaskU = 273;\n"
1699 #if RISCV64_DEBUG_CALL
1700 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1707 #if RISCV64_DEBUG_CALL
1708 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1711 #if RISCV64_DEBUG_CALL
1712 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1715 #if RISCV64_DEBUG_CALL
1716 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1718 "writeMaskM = 3003;\n"
1719 #if RISCV64_DEBUG_CALL
1720 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1722 "writeMaskS = 819;\n"
1723 #if RISCV64_DEBUG_CALL
1724 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1726 "writeMaskU = 273;\n"
1727 #if RISCV64_DEBUG_CALL
1728 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1732 "if(uAddr != sAddr)\n"
1734 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
1736 "writeMask = writeMaskM;\n"
1737 #if RISCV64_DEBUG_CALL
1738 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1742 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
1744 "writeMask = writeMaskS;\n"
1745 #if RISCV64_DEBUG_CALL
1746 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1750 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
1752 "writeMask = writeMaskU;\n"
1753 #if RISCV64_DEBUG_CALL
1754 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1758 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n"
1759 #if RISCV64_DEBUG_CALL
1760 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
1762 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1763 #if RISCV64_DEBUG_CALL
1764 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
1766 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1767 #if RISCV64_DEBUG_CALL
1768 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
1774 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = rs_val;\n"
1775 #if RISCV64_DEBUG_CALL
1776 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
1779 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = csr_val;\n"
1780 #if RISCV64_DEBUG_CALL
1781 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
1790 #if RISCV64_DEBUG_CALL
1791 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1794 #if RISCV64_DEBUG_CALL
1795 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1798 #if RISCV64_DEBUG_CALL
1799 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1801 "writeMaskM = -9223372036846388805;\n"
1802 #if RISCV64_DEBUG_CALL
1803 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1805 "writeMaskS = -9223372036853866189;\n"
1806 #if RISCV64_DEBUG_CALL
1807 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1809 "writeMaskU = -9223372036853866479;\n"
1810 #if RISCV64_DEBUG_CALL
1811 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1818 #if RISCV64_DEBUG_CALL
1819 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1822 #if RISCV64_DEBUG_CALL
1823 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1826 #if RISCV64_DEBUG_CALL
1827 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1829 "writeMaskM = 3003;\n"
1830 #if RISCV64_DEBUG_CALL
1831 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1833 "writeMaskS = 819;\n"
1834 #if RISCV64_DEBUG_CALL
1835 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1837 "writeMaskU = 273;\n"
1838 #if RISCV64_DEBUG_CALL
1839 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1846 #if RISCV64_DEBUG_CALL
1847 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
1850 #if RISCV64_DEBUG_CALL
1851 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
1854 #if RISCV64_DEBUG_CALL
1855 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
1857 "writeMaskM = 3003;\n"
1858 #if RISCV64_DEBUG_CALL
1859 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
1861 "writeMaskS = 819;\n"
1862 #if RISCV64_DEBUG_CALL
1863 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
1865 "writeMaskU = 273;\n"
1866 #if RISCV64_DEBUG_CALL
1867 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
1871 "if(uAddr != sAddr)\n"
1873 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
1875 "writeMask = writeMaskM;\n"
1876 #if RISCV64_DEBUG_CALL
1877 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1881 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
1883 "writeMask = writeMaskS;\n"
1884 #if RISCV64_DEBUG_CALL
1885 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1889 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
1891 "writeMask = writeMaskU;\n"
1892 #if RISCV64_DEBUG_CALL
1893 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
1897 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n"
1898 #if RISCV64_DEBUG_CALL
1899 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
1901 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1902 #if RISCV64_DEBUG_CALL
1903 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
1905 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
1906 #if RISCV64_DEBUG_CALL
1907 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
1913 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = rs_val;\n"
1914 #if RISCV64_DEBUG_CALL
1915 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
1961 partInit.
code() = std::string(
"//blt\n")+
1962 "etiss_uint32 temp = 0;\n"
1963 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
1964 #if RISCV64_Pipeline1
1965 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1966 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1967 "etiss_uint32 num_stages = 4;\n"
1968 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1969 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1971 #if RISCV64_Pipeline2
1972 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
1973 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
1974 "etiss_uint32 num_stages = 4;\n"
1975 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
1976 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
1979 "etiss_int64 imm_extended = 0;\n"
1980 "etiss_int64 choose1 = 0;\n"
1982 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
1984 "imm_extended = 0;\n"
1985 #if RISCV64_DEBUG_CALL
1986 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1992 "imm_extended = 4294967295;\n"
1993 #if RISCV64_DEBUG_CALL
1994 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
1996 "imm_extended = (imm_extended << 32);\n"
1997 #if RISCV64_DEBUG_CALL
1998 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2000 "imm_extended = imm_extended + 4294959104;\n"
2001 #if RISCV64_DEBUG_CALL
2002 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2005 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2006 #if RISCV64_DEBUG_CALL
2007 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2009 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
2010 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2012 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2014 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2015 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
2017 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
2019 "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n"
2022 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
2024 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
2026 "choose1 = (etiss_int64)cast_2 + imm_extended;\n"
2027 #if RISCV64_DEBUG_CALL
2028 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2037 #if RISCV64_DEBUG_CALL
2038 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2041 "cpu->instructionPointer = choose1;\n"
2042 #if RISCV64_DEBUG_CALL
2043 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
2046 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
2079 partInit.
code() = std::string(
"//lbu\n")+
2080 "etiss_uint32 exception = 0;\n"
2081 "etiss_uint32 temp = 0;\n"
2082 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2083 #if RISCV64_Pipeline1
2084 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2085 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2086 "etiss_uint32 num_stages = 4;\n"
2087 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2088 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2090 #if RISCV64_Pipeline2
2091 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2092 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2093 "etiss_uint32 num_stages = 4;\n"
2094 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2095 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2098 "etiss_int64 offs = 0;\n"
2099 "etiss_int64 imm_extended = 0;\n"
2101 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2103 "imm_extended = 0;\n"
2104 #if RISCV64_DEBUG_CALL
2105 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2111 "imm_extended = 4294967295;\n"
2112 #if RISCV64_DEBUG_CALL
2113 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2115 "imm_extended = (imm_extended << 32);\n"
2116 #if RISCV64_DEBUG_CALL
2117 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2119 "imm_extended = imm_extended + 4294963200;\n"
2120 #if RISCV64_DEBUG_CALL
2121 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2124 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2125 #if RISCV64_DEBUG_CALL
2126 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2128 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2129 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2131 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2133 "offs = (etiss_int64)cast_0 + imm_extended;\n"
2134 #if RISCV64_DEBUG_CALL
2135 "printf(\"offs = %#lx\\n\",offs); \n"
2139 "etiss_uint8 MEM_offs;\n"
2140 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
2141 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n"
2142 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)MEM_offs;\n"
2143 #if RISCV64_DEBUG_CALL
2144 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2151 "return exception;\n"
2182 partInit.
code() = std::string(
"//xori\n")+
2183 "etiss_uint32 temp = 0;\n"
2184 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2185 #if RISCV64_Pipeline1
2186 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2187 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2188 "etiss_uint32 num_stages = 4;\n"
2189 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2190 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2192 #if RISCV64_Pipeline2
2193 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2194 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2195 "etiss_uint32 num_stages = 4;\n"
2196 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2197 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2200 "etiss_int64 imm_extended = 0;\n"
2202 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2204 "imm_extended = 0;\n"
2205 #if RISCV64_DEBUG_CALL
2206 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2212 "imm_extended = 4294967295;\n"
2213 #if RISCV64_DEBUG_CALL
2214 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2216 "imm_extended = (imm_extended << 32);\n"
2217 #if RISCV64_DEBUG_CALL
2218 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2220 "imm_extended = imm_extended + 4294963200;\n"
2221 #if RISCV64_DEBUG_CALL
2222 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2225 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2226 #if RISCV64_DEBUG_CALL
2227 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2231 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2232 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2234 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2236 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 ^ imm_extended);\n"
2237 #if RISCV64_DEBUG_CALL
2238 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2284 partInit.
code() = std::string(
"//bge\n")+
2285 "etiss_uint32 temp = 0;\n"
2286 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2287 #if RISCV64_Pipeline1
2288 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2289 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2290 "etiss_uint32 num_stages = 4;\n"
2291 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2292 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2294 #if RISCV64_Pipeline2
2295 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2296 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2297 "etiss_uint32 num_stages = 4;\n"
2298 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2299 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2302 "etiss_int64 imm_extended = 0;\n"
2303 "etiss_int64 choose1 = 0;\n"
2305 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
2307 "imm_extended = 0;\n"
2308 #if RISCV64_DEBUG_CALL
2309 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2315 "imm_extended = 4294967295;\n"
2316 #if RISCV64_DEBUG_CALL
2317 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2319 "imm_extended = (imm_extended << 32);\n"
2320 #if RISCV64_DEBUG_CALL
2321 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2323 "imm_extended = imm_extended + 4294959104;\n"
2324 #if RISCV64_DEBUG_CALL
2325 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2328 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2329 #if RISCV64_DEBUG_CALL
2330 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2332 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
2333 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2335 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2337 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2338 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
2340 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
2342 "if((etiss_int64)cast_1 >= (etiss_int64)cast_0)\n"
2345 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
2347 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
2349 "choose1 = (etiss_int64)cast_2 + imm_extended;\n"
2350 #if RISCV64_DEBUG_CALL
2351 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2360 #if RISCV64_DEBUG_CALL
2361 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2364 "cpu->instructionPointer = choose1;\n"
2365 #if RISCV64_DEBUG_CALL
2366 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
2369 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
2402 partInit.
code() = std::string(
"//lhu\n")+
2403 "etiss_uint32 exception = 0;\n"
2404 "etiss_uint32 temp = 0;\n"
2405 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2406 #if RISCV64_Pipeline1
2407 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2408 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2409 "etiss_uint32 num_stages = 4;\n"
2410 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2411 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2413 #if RISCV64_Pipeline2
2414 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2415 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2416 "etiss_uint32 num_stages = 4;\n"
2417 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2418 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2421 "etiss_int64 offs = 0;\n"
2422 "etiss_int64 imm_extended = 0;\n"
2424 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2426 "imm_extended = 0;\n"
2427 #if RISCV64_DEBUG_CALL
2428 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2434 "imm_extended = 4294967295;\n"
2435 #if RISCV64_DEBUG_CALL
2436 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2438 "imm_extended = (imm_extended << 32);\n"
2439 #if RISCV64_DEBUG_CALL
2440 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2442 "imm_extended = imm_extended + 4294963200;\n"
2443 #if RISCV64_DEBUG_CALL
2444 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2447 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2448 #if RISCV64_DEBUG_CALL
2449 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2451 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2452 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2454 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2456 "offs = (etiss_int64)cast_0 + imm_extended;\n"
2457 #if RISCV64_DEBUG_CALL
2458 "printf(\"offs = %#lx\\n\",offs); \n"
2462 "etiss_uint16 MEM_offs;\n"
2463 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
2464 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n"
2465 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)MEM_offs;\n"
2466 #if RISCV64_DEBUG_CALL
2467 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2474 "return exception;\n"
2504 partInit.
code() = std::string(
"//csrrwi\n")+
2505 "etiss_uint32 temp = 0;\n"
2506 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2507 #if RISCV64_Pipeline1
2508 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2509 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2510 "etiss_uint32 num_stages = 4;\n"
2511 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2512 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2514 #if RISCV64_Pipeline2
2515 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2516 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2517 "etiss_uint32 num_stages = 4;\n"
2518 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2519 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2522 "etiss_int64 mAddr = 0;\n"
2523 "etiss_int64 writeMask = 0;\n"
2524 "etiss_int64 writeMaskU = 0;\n"
2525 "etiss_int64 sAddr = 0;\n"
2526 "etiss_int64 writeMaskS = 0;\n"
2527 "etiss_int64 uAddr = 0;\n"
2528 "etiss_int64 writeMaskM = 0;\n"
2532 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
2533 #if RISCV64_DEBUG_CALL
2534 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2541 #if RISCV64_DEBUG_CALL
2542 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2545 #if RISCV64_DEBUG_CALL
2546 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2549 #if RISCV64_DEBUG_CALL
2550 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2552 "writeMaskM = -9223372036846388805;\n"
2553 #if RISCV64_DEBUG_CALL
2554 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2556 "writeMaskS = -9223372036853866189;\n"
2557 #if RISCV64_DEBUG_CALL
2558 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2560 "writeMaskU = -9223372036853866479;\n"
2561 #if RISCV64_DEBUG_CALL
2562 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2569 #if RISCV64_DEBUG_CALL
2570 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2573 #if RISCV64_DEBUG_CALL
2574 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2577 #if RISCV64_DEBUG_CALL
2578 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2580 "writeMaskM = 3003;\n"
2581 #if RISCV64_DEBUG_CALL
2582 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2584 "writeMaskS = 819;\n"
2585 #if RISCV64_DEBUG_CALL
2586 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2588 "writeMaskU = 273;\n"
2589 #if RISCV64_DEBUG_CALL
2590 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2597 #if RISCV64_DEBUG_CALL
2598 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2601 #if RISCV64_DEBUG_CALL
2602 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2605 #if RISCV64_DEBUG_CALL
2606 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2608 "writeMaskM = 3003;\n"
2609 #if RISCV64_DEBUG_CALL
2610 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2612 "writeMaskS = 819;\n"
2613 #if RISCV64_DEBUG_CALL
2614 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2616 "writeMaskU = 273;\n"
2617 #if RISCV64_DEBUG_CALL
2618 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2622 "if(uAddr != sAddr)\n"
2624 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
2626 "writeMask = writeMaskM;\n"
2627 #if RISCV64_DEBUG_CALL
2628 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
2632 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
2634 "writeMask = writeMaskS;\n"
2635 #if RISCV64_DEBUG_CALL
2636 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
2640 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
2642 "writeMask = writeMaskU;\n"
2643 #if RISCV64_DEBUG_CALL
2644 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
2648 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((etiss_uint64)" +
toString(zimm) +
" & writeMask))&0xffffffffffffffff;\n"
2649 #if RISCV64_DEBUG_CALL
2650 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
2652 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
2653 #if RISCV64_DEBUG_CALL
2654 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
2656 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
2657 #if RISCV64_DEBUG_CALL
2658 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
2664 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (etiss_uint64)" +
toString(zimm) +
";\n"
2665 #if RISCV64_DEBUG_CALL
2666 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
2711 partInit.
code() = std::string(
"//bltu\n")+
2712 "etiss_uint32 temp = 0;\n"
2713 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2714 #if RISCV64_Pipeline1
2715 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2716 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2717 "etiss_uint32 num_stages = 4;\n"
2718 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2719 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2721 #if RISCV64_Pipeline2
2722 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2723 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2724 "etiss_uint32 num_stages = 4;\n"
2725 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2726 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2729 "etiss_int64 imm_extended = 0;\n"
2730 "etiss_int64 choose1 = 0;\n"
2732 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
2734 "imm_extended = 0;\n"
2735 #if RISCV64_DEBUG_CALL
2736 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2742 "imm_extended = 4294967295;\n"
2743 #if RISCV64_DEBUG_CALL
2744 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2746 "imm_extended = (imm_extended << 32);\n"
2747 #if RISCV64_DEBUG_CALL
2748 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2750 "imm_extended = imm_extended + 4294959104;\n"
2751 #if RISCV64_DEBUG_CALL
2752 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2755 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2756 #if RISCV64_DEBUG_CALL
2757 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2759 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] < *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
2762 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2764 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2766 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
2767 #if RISCV64_DEBUG_CALL
2768 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2777 #if RISCV64_DEBUG_CALL
2778 "printf(\"choose1 = %#lx\\n\",choose1); \n"
2781 "cpu->instructionPointer = choose1;\n"
2782 #if RISCV64_DEBUG_CALL
2783 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
2786 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
2819 partInit.
code() = std::string(
"//ori\n")+
2820 "etiss_uint32 temp = 0;\n"
2821 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2822 #if RISCV64_Pipeline1
2823 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2824 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2825 "etiss_uint32 num_stages = 4;\n"
2826 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2827 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2829 #if RISCV64_Pipeline2
2830 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2831 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2832 "etiss_uint32 num_stages = 4;\n"
2833 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2834 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2837 "etiss_int64 imm_extended = 0;\n"
2839 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
2841 "imm_extended = 0;\n"
2842 #if RISCV64_DEBUG_CALL
2843 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2849 "imm_extended = 4294967295;\n"
2850 #if RISCV64_DEBUG_CALL
2851 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
2853 "imm_extended = (imm_extended << 32);\n"
2854 #if RISCV64_DEBUG_CALL
2855 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2857 "imm_extended = imm_extended + 4294963200;\n"
2858 #if RISCV64_DEBUG_CALL
2859 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2862 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
2863 #if RISCV64_DEBUG_CALL
2864 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
2868 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
2869 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
2871 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
2873 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 | imm_extended);\n"
2874 #if RISCV64_DEBUG_CALL
2875 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
2911 partInit.
code() = std::string(
"//csrrsi\n")+
2912 "etiss_uint32 temp = 0;\n"
2913 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
2914 #if RISCV64_Pipeline1
2915 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2916 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2917 "etiss_uint32 num_stages = 4;\n"
2918 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2919 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2921 #if RISCV64_Pipeline2
2922 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
2923 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
2924 "etiss_uint32 num_stages = 4;\n"
2925 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
2926 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
2929 "etiss_uint64 res = 0;\n"
2930 "etiss_int64 mAddr = 0;\n"
2931 "etiss_int64 writeMask = 0;\n"
2932 "etiss_int64 writeMaskU = 0;\n"
2933 "etiss_int64 sAddr = 0;\n"
2934 "etiss_int64 writeMaskS = 0;\n"
2935 "etiss_int64 uAddr = 0;\n"
2936 "etiss_int64 writeMaskM = 0;\n"
2938 "res = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
2939 #if RISCV64_DEBUG_CALL
2940 "printf(\"res = %#lx\\n\",res); \n"
2942 "if(" +
toString(zimm) +
" != 0)\n"
2947 #if RISCV64_DEBUG_CALL
2948 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2951 #if RISCV64_DEBUG_CALL
2952 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2955 #if RISCV64_DEBUG_CALL
2956 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2958 "writeMaskM = -9223372036846388805;\n"
2959 #if RISCV64_DEBUG_CALL
2960 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2962 "writeMaskS = -9223372036853866189;\n"
2963 #if RISCV64_DEBUG_CALL
2964 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2966 "writeMaskU = -9223372036853866479;\n"
2967 #if RISCV64_DEBUG_CALL
2968 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
2975 #if RISCV64_DEBUG_CALL
2976 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
2979 #if RISCV64_DEBUG_CALL
2980 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
2983 #if RISCV64_DEBUG_CALL
2984 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
2986 "writeMaskM = 3003;\n"
2987 #if RISCV64_DEBUG_CALL
2988 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
2990 "writeMaskS = 819;\n"
2991 #if RISCV64_DEBUG_CALL
2992 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
2994 "writeMaskU = 273;\n"
2995 #if RISCV64_DEBUG_CALL
2996 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3003 #if RISCV64_DEBUG_CALL
3004 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3007 #if RISCV64_DEBUG_CALL
3008 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3011 #if RISCV64_DEBUG_CALL
3012 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3014 "writeMaskM = 3003;\n"
3015 #if RISCV64_DEBUG_CALL
3016 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3018 "writeMaskS = 819;\n"
3019 #if RISCV64_DEBUG_CALL
3020 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3022 "writeMaskU = 273;\n"
3023 #if RISCV64_DEBUG_CALL
3024 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3028 "if(uAddr != sAddr)\n"
3030 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
3032 "writeMask = writeMaskM;\n"
3033 #if RISCV64_DEBUG_CALL
3034 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3038 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
3040 "writeMask = writeMaskS;\n"
3041 #if RISCV64_DEBUG_CALL
3042 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3046 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
3048 "writeMask = writeMaskU;\n"
3049 #if RISCV64_DEBUG_CALL
3050 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3054 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res | (etiss_uint64)" +
toString(zimm) +
") & writeMask))&0xffffffffffffffff;\n"
3055 #if RISCV64_DEBUG_CALL
3056 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
3058 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3059 #if RISCV64_DEBUG_CALL
3060 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
3062 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3063 #if RISCV64_DEBUG_CALL
3064 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
3070 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (res | (etiss_uint64)" +
toString(zimm) +
");\n"
3071 #if RISCV64_DEBUG_CALL
3072 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
3079 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
3080 #if RISCV64_DEBUG_CALL
3081 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3118 partInit.
code() = std::string(
"//lwu\n")+
3119 "etiss_uint32 exception = 0;\n"
3120 "etiss_uint32 temp = 0;\n"
3121 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3122 #if RISCV64_Pipeline1
3123 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3124 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3125 "etiss_uint32 num_stages = 4;\n"
3126 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3127 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3129 #if RISCV64_Pipeline2
3130 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3131 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3132 "etiss_uint32 num_stages = 4;\n"
3133 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3134 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3137 "etiss_int64 offs = 0;\n"
3138 "etiss_int64 imm_extended = 0;\n"
3140 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3142 "imm_extended = 0;\n"
3143 #if RISCV64_DEBUG_CALL
3144 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3150 "imm_extended = 4294967295;\n"
3151 #if RISCV64_DEBUG_CALL
3152 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3154 "imm_extended = (imm_extended << 32);\n"
3155 #if RISCV64_DEBUG_CALL
3156 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3158 "imm_extended = imm_extended + 4294963200;\n"
3159 #if RISCV64_DEBUG_CALL
3160 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3163 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3164 #if RISCV64_DEBUG_CALL
3165 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3167 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3168 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3170 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3172 "offs = (etiss_int64)cast_0 + imm_extended;\n"
3173 #if RISCV64_DEBUG_CALL
3174 "printf(\"offs = %#lx\\n\",offs); \n"
3178 "etiss_uint32 MEM_offs;\n"
3179 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
3180 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
3181 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)MEM_offs;\n"
3182 #if RISCV64_DEBUG_CALL
3183 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3190 "return exception;\n"
3230 partInit.
code() = std::string(
"//bgeu\n")+
3231 "etiss_uint32 temp = 0;\n"
3232 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3233 #if RISCV64_Pipeline1
3234 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3235 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3236 "etiss_uint32 num_stages = 4;\n"
3237 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3238 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3240 #if RISCV64_Pipeline2
3241 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3242 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3243 "etiss_uint32 num_stages = 4;\n"
3244 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3245 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3248 "etiss_int64 imm_extended = 0;\n"
3249 "etiss_int64 choose1 = 0;\n"
3251 "if((" +
toString(imm) +
" & 0x1000)>>12 == 0)\n"
3253 "imm_extended = 0;\n"
3254 #if RISCV64_DEBUG_CALL
3255 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3261 "imm_extended = 4294967295;\n"
3262 #if RISCV64_DEBUG_CALL
3263 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3265 "imm_extended = (imm_extended << 32);\n"
3266 #if RISCV64_DEBUG_CALL
3267 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3269 "imm_extended = imm_extended + 4294959104;\n"
3270 #if RISCV64_DEBUG_CALL
3271 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3274 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3275 #if RISCV64_DEBUG_CALL
3276 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3278 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] >= *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
3281 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3283 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3285 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
3286 #if RISCV64_DEBUG_CALL
3287 "printf(\"choose1 = %#lx\\n\",choose1); \n"
3296 #if RISCV64_DEBUG_CALL
3297 "printf(\"choose1 = %#lx\\n\",choose1); \n"
3300 "cpu->instructionPointer = choose1;\n"
3301 #if RISCV64_DEBUG_CALL
3302 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
3305 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
3338 partInit.
code() = std::string(
"//andi\n")+
3339 "etiss_uint32 temp = 0;\n"
3340 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3341 #if RISCV64_Pipeline1
3342 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3343 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3344 "etiss_uint32 num_stages = 4;\n"
3345 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3346 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3348 #if RISCV64_Pipeline2
3349 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3350 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3351 "etiss_uint32 num_stages = 4;\n"
3352 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3353 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3356 "etiss_int64 imm_extended = 0;\n"
3358 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3360 "imm_extended = 0;\n"
3361 #if RISCV64_DEBUG_CALL
3362 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3368 "imm_extended = 4294967295;\n"
3369 #if RISCV64_DEBUG_CALL
3370 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3372 "imm_extended = (imm_extended << 32);\n"
3373 #if RISCV64_DEBUG_CALL
3374 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3376 "imm_extended = imm_extended + 4294963200;\n"
3377 #if RISCV64_DEBUG_CALL
3378 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3381 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3382 #if RISCV64_DEBUG_CALL
3383 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3387 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3388 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3390 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3392 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 & imm_extended);\n"
3393 #if RISCV64_DEBUG_CALL
3394 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3430 partInit.
code() = std::string(
"//csrrci\n")+
3431 "etiss_uint32 temp = 0;\n"
3432 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3433 #if RISCV64_Pipeline1
3434 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3435 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3436 "etiss_uint32 num_stages = 4;\n"
3437 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3438 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3440 #if RISCV64_Pipeline2
3441 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3442 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3443 "etiss_uint32 num_stages = 4;\n"
3444 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3445 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3448 "etiss_uint64 res = 0;\n"
3449 "etiss_int64 mAddr = 0;\n"
3450 "etiss_int64 writeMask = 0;\n"
3451 "etiss_int64 writeMaskU = 0;\n"
3452 "etiss_int64 sAddr = 0;\n"
3453 "etiss_int64 writeMaskS = 0;\n"
3454 "etiss_int64 uAddr = 0;\n"
3455 "etiss_int64 writeMaskM = 0;\n"
3457 "res = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
3458 #if RISCV64_DEBUG_CALL
3459 "printf(\"res = %#lx\\n\",res); \n"
3463 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
3464 #if RISCV64_DEBUG_CALL
3465 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3469 "if(" +
toString(zimm) +
" != 0)\n"
3474 #if RISCV64_DEBUG_CALL
3475 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3478 #if RISCV64_DEBUG_CALL
3479 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3482 #if RISCV64_DEBUG_CALL
3483 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3485 "writeMaskM = -9223372036846388805;\n"
3486 #if RISCV64_DEBUG_CALL
3487 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3489 "writeMaskS = -9223372036853866189;\n"
3490 #if RISCV64_DEBUG_CALL
3491 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3493 "writeMaskU = -9223372036853866479;\n"
3494 #if RISCV64_DEBUG_CALL
3495 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3502 #if RISCV64_DEBUG_CALL
3503 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3506 #if RISCV64_DEBUG_CALL
3507 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3510 #if RISCV64_DEBUG_CALL
3511 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3513 "writeMaskM = 3003;\n"
3514 #if RISCV64_DEBUG_CALL
3515 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3517 "writeMaskS = 819;\n"
3518 #if RISCV64_DEBUG_CALL
3519 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3521 "writeMaskU = 273;\n"
3522 #if RISCV64_DEBUG_CALL
3523 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3530 #if RISCV64_DEBUG_CALL
3531 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
3534 #if RISCV64_DEBUG_CALL
3535 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
3538 #if RISCV64_DEBUG_CALL
3539 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
3541 "writeMaskM = 3003;\n"
3542 #if RISCV64_DEBUG_CALL
3543 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
3545 "writeMaskS = 819;\n"
3546 #if RISCV64_DEBUG_CALL
3547 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
3549 "writeMaskU = 273;\n"
3550 #if RISCV64_DEBUG_CALL
3551 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
3555 "if(uAddr != sAddr)\n"
3557 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
3559 "writeMask = writeMaskM;\n"
3560 #if RISCV64_DEBUG_CALL
3561 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3565 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
3567 "writeMask = writeMaskS;\n"
3568 #if RISCV64_DEBUG_CALL
3569 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3573 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
3575 "writeMask = writeMaskU;\n"
3576 #if RISCV64_DEBUG_CALL
3577 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
3581 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res & ~(etiss_uint64)" +
toString(zimm) +
") & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n"
3582 #if RISCV64_DEBUG_CALL
3583 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
3585 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3586 #if RISCV64_DEBUG_CALL
3587 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
3589 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
3590 #if RISCV64_DEBUG_CALL
3591 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
3597 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (res & ~(etiss_uint64)" +
toString(zimm) +
")&0xffffffffffffffff;\n"
3598 #if RISCV64_DEBUG_CALL
3599 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
3637 partInit.
code() = std::string(
"//lw\n")+
3638 "etiss_uint32 exception = 0;\n"
3639 "etiss_uint32 temp = 0;\n"
3640 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3641 #if RISCV64_Pipeline1
3642 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3643 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3644 "etiss_uint32 num_stages = 4;\n"
3645 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3646 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3648 #if RISCV64_Pipeline2
3649 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3650 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3651 "etiss_uint32 num_stages = 4;\n"
3652 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3653 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3656 "etiss_int64 offs = 0;\n"
3657 "etiss_int64 imm_extended = 0;\n"
3659 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3661 "imm_extended = 0;\n"
3662 #if RISCV64_DEBUG_CALL
3663 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3669 "imm_extended = 4294967295;\n"
3670 #if RISCV64_DEBUG_CALL
3671 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3673 "imm_extended = (imm_extended << 32);\n"
3674 #if RISCV64_DEBUG_CALL
3675 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3677 "imm_extended = imm_extended + 4294963200;\n"
3678 #if RISCV64_DEBUG_CALL
3679 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3682 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3683 #if RISCV64_DEBUG_CALL
3684 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3686 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3687 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3689 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3691 "offs = (etiss_int64)cast_0 + imm_extended;\n"
3692 #if RISCV64_DEBUG_CALL
3693 "printf(\"offs = %#lx\\n\",offs); \n"
3697 "etiss_uint32 MEM_offs;\n"
3698 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
3699 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
3700 "etiss_int32 cast_1 = MEM_offs; \n"
3701 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
3703 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
3705 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
3706 #if RISCV64_DEBUG_CALL
3707 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3714 "return exception;\n"
3748 partInit.
code() = std::string(
"//sw\n")+
3749 "etiss_uint32 exception = 0;\n"
3750 "etiss_uint32 temp = 0;\n"
3751 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3752 #if RISCV64_Pipeline1
3753 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3754 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3755 "etiss_uint32 num_stages = 4;\n"
3756 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3757 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3759 #if RISCV64_Pipeline2
3760 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3761 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3762 "etiss_uint32 num_stages = 4;\n"
3763 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3764 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3767 "etiss_int64 offs = 0;\n"
3768 "etiss_int64 imm_extended = 0;\n"
3770 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3772 "imm_extended = 0;\n"
3773 #if RISCV64_DEBUG_CALL
3774 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3780 "imm_extended = 4294967295;\n"
3781 #if RISCV64_DEBUG_CALL
3782 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3784 "imm_extended = (imm_extended << 32);\n"
3785 #if RISCV64_DEBUG_CALL
3786 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3788 "imm_extended = imm_extended + 4294963200;\n"
3789 #if RISCV64_DEBUG_CALL
3790 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3793 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3794 #if RISCV64_DEBUG_CALL
3795 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3797 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3798 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3800 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3802 "offs = (etiss_int64)cast_0 + imm_extended;\n"
3803 #if RISCV64_DEBUG_CALL
3804 "printf(\"offs = %#lx\\n\",offs); \n"
3806 "etiss_uint32 MEM_offs;\n"
3807 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
3808 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
3809 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
3810 #if RISCV64_DEBUG_CALL
3811 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
3813 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
3815 "((RISCV64*)cpu)->RES = 0;\n"
3816 #if RISCV64_DEBUG_CALL
3817 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
3824 "return exception;\n"
3855 partInit.
code() = std::string(
"//slti\n")+
3856 "etiss_uint32 temp = 0;\n"
3857 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3858 #if RISCV64_Pipeline1
3859 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3860 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3861 "etiss_uint32 num_stages = 4;\n"
3862 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3863 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3865 #if RISCV64_Pipeline2
3866 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3867 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3868 "etiss_uint32 num_stages = 4;\n"
3869 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3870 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3873 "etiss_int64 imm_extended = 0;\n"
3874 "etiss_int8 choose1 = 0;\n"
3876 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
3878 "imm_extended = 0;\n"
3879 #if RISCV64_DEBUG_CALL
3880 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3886 "imm_extended = 4294967295;\n"
3887 #if RISCV64_DEBUG_CALL
3888 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
3890 "imm_extended = (imm_extended << 32);\n"
3891 #if RISCV64_DEBUG_CALL
3892 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3894 "imm_extended = imm_extended + 4294963200;\n"
3895 #if RISCV64_DEBUG_CALL
3896 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3899 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
3900 #if RISCV64_DEBUG_CALL
3901 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
3905 "etiss_int64 cast_0 = imm_extended; \n"
3906 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
3908 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
3910 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
3911 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
3913 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
3915 "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n"
3918 #if RISCV64_DEBUG_CALL
3919 "printf(\"choose1 = %#x\\n\",choose1); \n"
3926 #if RISCV64_DEBUG_CALL
3927 "printf(\"choose1 = %#x\\n\",choose1); \n"
3930 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
3931 #if RISCV64_DEBUG_CALL
3932 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
3969 partInit.
code() = std::string(
"//csrrs\n")+
3970 "etiss_uint32 temp = 0;\n"
3971 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
3972 #if RISCV64_Pipeline1
3973 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3974 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3975 "etiss_uint32 num_stages = 4;\n"
3976 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3977 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3979 #if RISCV64_Pipeline2
3980 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
3981 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
3982 "etiss_uint32 num_stages = 4;\n"
3983 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
3984 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
3987 "etiss_uint64 xrs1 = 0;\n"
3988 "etiss_int64 mAddr = 0;\n"
3989 "etiss_int64 writeMask = 0;\n"
3990 "etiss_int64 writeMaskU = 0;\n"
3991 "etiss_int64 sAddr = 0;\n"
3992 "etiss_int64 writeMaskS = 0;\n"
3993 "etiss_int64 uAddr = 0;\n"
3994 "etiss_uint64 xrd = 0;\n"
3995 "etiss_int64 writeMaskM = 0;\n"
3997 "xrd = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
3998 #if RISCV64_DEBUG_CALL
3999 "printf(\"xrd = %#lx\\n\",xrd); \n"
4001 "xrs1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
4002 #if RISCV64_DEBUG_CALL
4003 "printf(\"xrs1 = %#lx\\n\",xrs1); \n"
4007 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = xrd;\n"
4008 #if RISCV64_DEBUG_CALL
4009 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4018 #if RISCV64_DEBUG_CALL
4019 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4022 #if RISCV64_DEBUG_CALL
4023 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4026 #if RISCV64_DEBUG_CALL
4027 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4029 "writeMaskM = -9223372036846388805;\n"
4030 #if RISCV64_DEBUG_CALL
4031 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4033 "writeMaskS = -9223372036853866189;\n"
4034 #if RISCV64_DEBUG_CALL
4035 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4037 "writeMaskU = -9223372036853866479;\n"
4038 #if RISCV64_DEBUG_CALL
4039 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4046 #if RISCV64_DEBUG_CALL
4047 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4050 #if RISCV64_DEBUG_CALL
4051 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4054 #if RISCV64_DEBUG_CALL
4055 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4057 "writeMaskM = 3003;\n"
4058 #if RISCV64_DEBUG_CALL
4059 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4061 "writeMaskS = 819;\n"
4062 #if RISCV64_DEBUG_CALL
4063 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4065 "writeMaskU = 273;\n"
4066 #if RISCV64_DEBUG_CALL
4067 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4074 #if RISCV64_DEBUG_CALL
4075 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4078 #if RISCV64_DEBUG_CALL
4079 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4082 #if RISCV64_DEBUG_CALL
4083 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4085 "writeMaskM = 3003;\n"
4086 #if RISCV64_DEBUG_CALL
4087 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4089 "writeMaskS = 819;\n"
4090 #if RISCV64_DEBUG_CALL
4091 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4093 "writeMaskU = 273;\n"
4094 #if RISCV64_DEBUG_CALL
4095 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4099 "if(uAddr != sAddr)\n"
4101 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
4103 "writeMask = writeMaskM;\n"
4104 #if RISCV64_DEBUG_CALL
4105 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4109 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
4111 "writeMask = writeMaskS;\n"
4112 #if RISCV64_DEBUG_CALL
4113 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4117 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
4119 "writeMask = writeMaskU;\n"
4120 #if RISCV64_DEBUG_CALL
4121 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4125 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd | xrs1) & writeMask))&0xffffffffffffffff;\n"
4126 #if RISCV64_DEBUG_CALL
4127 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
4129 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4130 #if RISCV64_DEBUG_CALL
4131 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
4133 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4134 #if RISCV64_DEBUG_CALL
4135 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
4141 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (xrd | xrs1);\n"
4142 #if RISCV64_DEBUG_CALL
4143 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
4181 partInit.
code() = std::string(
"//flw\n")+
4182 "etiss_uint32 exception = 0;\n"
4183 "etiss_uint32 temp = 0;\n"
4184 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4185 #if RISCV64_Pipeline1
4186 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4187 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4188 "etiss_uint32 num_stages = 4;\n"
4189 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4190 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4192 #if RISCV64_Pipeline2
4193 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4194 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4195 "etiss_uint32 num_stages = 4;\n"
4196 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4197 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4200 "etiss_int64 offs = 0;\n"
4201 "etiss_int64 imm_extended = 0;\n"
4202 "etiss_uint32 res = 0;\n"
4203 "etiss_int64 upper = 0;\n"
4205 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4207 "imm_extended = 0;\n"
4208 #if RISCV64_DEBUG_CALL
4209 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4215 "imm_extended = 4294967295;\n"
4216 #if RISCV64_DEBUG_CALL
4217 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4219 "imm_extended = (imm_extended << 32);\n"
4220 #if RISCV64_DEBUG_CALL
4221 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4223 "imm_extended = imm_extended + 4294963200;\n"
4224 #if RISCV64_DEBUG_CALL
4225 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4228 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4229 #if RISCV64_DEBUG_CALL
4230 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4232 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4233 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4235 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4237 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4238 #if RISCV64_DEBUG_CALL
4239 "printf(\"offs = %#lx\\n\",offs); \n"
4241 "etiss_uint32 MEM_offs;\n"
4242 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4243 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
4245 #if RISCV64_DEBUG_CALL
4246 "printf(\"res = %#x\\n\",res); \n"
4250 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
4251 #if RISCV64_DEBUG_CALL
4252 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
4259 #if RISCV64_DEBUG_CALL
4260 "printf(\"upper = %#lx\\n\",upper); \n"
4262 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
4263 #if RISCV64_DEBUG_CALL
4264 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
4270 "return exception;\n"
4304 partInit.
code() = std::string(
"//fsw\n")+
4305 "etiss_uint32 exception = 0;\n"
4306 "etiss_uint32 temp = 0;\n"
4307 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4308 #if RISCV64_Pipeline1
4309 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4310 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4311 "etiss_uint32 num_stages = 4;\n"
4312 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4313 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4315 #if RISCV64_Pipeline2
4316 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4317 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4318 "etiss_uint32 num_stages = 4;\n"
4319 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4320 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4323 "etiss_int64 offs = 0;\n"
4324 "etiss_int64 imm_extended = 0;\n"
4326 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4328 "imm_extended = 0;\n"
4329 #if RISCV64_DEBUG_CALL
4330 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4336 "imm_extended = 4294967295;\n"
4337 #if RISCV64_DEBUG_CALL
4338 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4340 "imm_extended = (imm_extended << 32);\n"
4341 #if RISCV64_DEBUG_CALL
4342 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4344 "imm_extended = imm_extended + 4294963200;\n"
4345 #if RISCV64_DEBUG_CALL
4346 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4349 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4350 #if RISCV64_DEBUG_CALL
4351 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4353 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4354 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4356 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4358 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4359 #if RISCV64_DEBUG_CALL
4360 "printf(\"offs = %#lx\\n\",offs); \n"
4362 "etiss_uint32 MEM_offs;\n"
4363 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4364 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffff);\n"
4365 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
4366 #if RISCV64_DEBUG_CALL
4367 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
4369 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
4371 "((RISCV64*)cpu)->RES = 0;\n"
4372 #if RISCV64_DEBUG_CALL
4373 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
4380 "return exception;\n"
4411 partInit.
code() = std::string(
"//sltiu\n")+
4412 "etiss_uint32 temp = 0;\n"
4413 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4414 #if RISCV64_Pipeline1
4415 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4416 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4417 "etiss_uint32 num_stages = 4;\n"
4418 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4419 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4421 #if RISCV64_Pipeline2
4422 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4423 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4424 "etiss_uint32 num_stages = 4;\n"
4425 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4426 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4429 "etiss_int64 imm_extended = 0;\n"
4430 "etiss_int64 full_imm = 0;\n"
4431 "etiss_int8 choose1 = 0;\n"
4433 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4435 "imm_extended = 0;\n"
4436 #if RISCV64_DEBUG_CALL
4437 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4443 "imm_extended = 4294967295;\n"
4444 #if RISCV64_DEBUG_CALL
4445 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4447 "imm_extended = (imm_extended << 32);\n"
4448 #if RISCV64_DEBUG_CALL
4449 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4451 "imm_extended = imm_extended + 4294963200;\n"
4452 #if RISCV64_DEBUG_CALL
4453 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4456 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4457 #if RISCV64_DEBUG_CALL
4458 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4460 "etiss_int64 cast_0 = imm_extended; \n"
4461 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4463 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4465 "full_imm = (etiss_int64)cast_0;\n"
4466 #if RISCV64_DEBUG_CALL
4467 "printf(\"full_imm = %#lx\\n\",full_imm); \n"
4471 "if((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] < (etiss_uint64)full_imm)\n"
4474 #if RISCV64_DEBUG_CALL
4475 "printf(\"choose1 = %#x\\n\",choose1); \n"
4482 #if RISCV64_DEBUG_CALL
4483 "printf(\"choose1 = %#x\\n\",choose1); \n"
4486 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
4487 #if RISCV64_DEBUG_CALL
4488 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4525 partInit.
code() = std::string(
"//csrrc\n")+
4526 "etiss_uint32 temp = 0;\n"
4527 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4528 #if RISCV64_Pipeline1
4529 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4530 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4531 "etiss_uint32 num_stages = 4;\n"
4532 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4533 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4535 #if RISCV64_Pipeline2
4536 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4537 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4538 "etiss_uint32 num_stages = 4;\n"
4539 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4540 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4543 "etiss_uint64 xrs1 = 0;\n"
4544 "etiss_int64 mAddr = 0;\n"
4545 "etiss_int64 writeMask = 0;\n"
4546 "etiss_int64 writeMaskU = 0;\n"
4547 "etiss_int64 sAddr = 0;\n"
4548 "etiss_int64 writeMaskS = 0;\n"
4549 "etiss_int64 uAddr = 0;\n"
4550 "etiss_uint64 xrd = 0;\n"
4551 "etiss_int64 writeMaskM = 0;\n"
4553 "xrd = ((RISCV64*)cpu)->CSR[" +
toString(csr) +
"];\n"
4554 #if RISCV64_DEBUG_CALL
4555 "printf(\"xrd = %#lx\\n\",xrd); \n"
4557 "xrs1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
4558 #if RISCV64_DEBUG_CALL
4559 "printf(\"xrs1 = %#lx\\n\",xrs1); \n"
4563 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = xrd;\n"
4564 #if RISCV64_DEBUG_CALL
4565 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4574 #if RISCV64_DEBUG_CALL
4575 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4578 #if RISCV64_DEBUG_CALL
4579 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4582 #if RISCV64_DEBUG_CALL
4583 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4585 "writeMaskM = -9223372036846388805;\n"
4586 #if RISCV64_DEBUG_CALL
4587 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4589 "writeMaskS = -9223372036853866189;\n"
4590 #if RISCV64_DEBUG_CALL
4591 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4593 "writeMaskU = -9223372036853866479;\n"
4594 #if RISCV64_DEBUG_CALL
4595 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4602 #if RISCV64_DEBUG_CALL
4603 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4606 #if RISCV64_DEBUG_CALL
4607 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4610 #if RISCV64_DEBUG_CALL
4611 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4613 "writeMaskM = 3003;\n"
4614 #if RISCV64_DEBUG_CALL
4615 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4617 "writeMaskS = 819;\n"
4618 #if RISCV64_DEBUG_CALL
4619 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4621 "writeMaskU = 273;\n"
4622 #if RISCV64_DEBUG_CALL
4623 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4630 #if RISCV64_DEBUG_CALL
4631 "printf(\"uAddr = %#lx\\n\",uAddr); \n"
4634 #if RISCV64_DEBUG_CALL
4635 "printf(\"sAddr = %#lx\\n\",sAddr); \n"
4638 #if RISCV64_DEBUG_CALL
4639 "printf(\"mAddr = %#lx\\n\",mAddr); \n"
4641 "writeMaskM = 3003;\n"
4642 #if RISCV64_DEBUG_CALL
4643 "printf(\"writeMaskM = %#lx\\n\",writeMaskM); \n"
4645 "writeMaskS = 819;\n"
4646 #if RISCV64_DEBUG_CALL
4647 "printf(\"writeMaskS = %#lx\\n\",writeMaskS); \n"
4649 "writeMaskU = 273;\n"
4650 #if RISCV64_DEBUG_CALL
4651 "printf(\"writeMaskU = %#lx\\n\",writeMaskU); \n"
4655 "if(uAddr != sAddr)\n"
4657 "if(((RISCV64*)cpu)->CSR[3088] == 3)\n"
4659 "writeMask = writeMaskM;\n"
4660 #if RISCV64_DEBUG_CALL
4661 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4665 "if(((RISCV64*)cpu)->CSR[3088] == 1)\n"
4667 "writeMask = writeMaskS;\n"
4668 #if RISCV64_DEBUG_CALL
4669 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4673 "if(((RISCV64*)cpu)->CSR[3088] == 0)\n"
4675 "writeMask = writeMaskU;\n"
4676 #if RISCV64_DEBUG_CALL
4677 "printf(\"writeMask = %#lx\\n\",writeMask); \n"
4681 "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd & ~xrs1) & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n"
4682 #if RISCV64_DEBUG_CALL
4683 "printf(\"((RISCV64*)cpu)->CSR[uAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[uAddr]); \n"
4685 "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4686 #if RISCV64_DEBUG_CALL
4687 "printf(\"((RISCV64*)cpu)->CSR[sAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[sAddr]); \n"
4689 "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n"
4690 #if RISCV64_DEBUG_CALL
4691 "printf(\"((RISCV64*)cpu)->CSR[mAddr] = %#lx\\n\",((RISCV64*)cpu)->CSR[mAddr]); \n"
4697 "((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = (xrd & ~xrs1)&0xffffffffffffffff;\n"
4698 #if RISCV64_DEBUG_CALL
4699 "printf(\"((RISCV64*)cpu)->CSR[" +
toString(csr) +
"] = %#lx\\n\",((RISCV64*)cpu)->CSR[" +
toString(csr) +
"]); \n"
4737 partInit.
code() = std::string(
"//ld\n")+
4738 "etiss_uint32 exception = 0;\n"
4739 "etiss_uint32 temp = 0;\n"
4740 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4741 #if RISCV64_Pipeline1
4742 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4743 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4744 "etiss_uint32 num_stages = 4;\n"
4745 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4746 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4748 #if RISCV64_Pipeline2
4749 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4750 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4751 "etiss_uint32 num_stages = 4;\n"
4752 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4753 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4756 "etiss_int64 offs = 0;\n"
4757 "etiss_int64 imm_extended = 0;\n"
4759 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4761 "imm_extended = 0;\n"
4762 #if RISCV64_DEBUG_CALL
4763 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4769 "imm_extended = 4294967295;\n"
4770 #if RISCV64_DEBUG_CALL
4771 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4773 "imm_extended = (imm_extended << 32);\n"
4774 #if RISCV64_DEBUG_CALL
4775 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4777 "imm_extended = imm_extended + 4294963200;\n"
4778 #if RISCV64_DEBUG_CALL
4779 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4782 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4783 #if RISCV64_DEBUG_CALL
4784 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4786 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4787 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4789 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4791 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4792 #if RISCV64_DEBUG_CALL
4793 "printf(\"offs = %#lx\\n\",offs); \n"
4797 "etiss_uint64 MEM_offs;\n"
4798 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4799 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
4800 "etiss_int64 cast_1 = MEM_offs; \n"
4801 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
4803 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
4805 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
4806 #if RISCV64_DEBUG_CALL
4807 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
4814 "return exception;\n"
4848 partInit.
code() = std::string(
"//sd\n")+
4849 "etiss_uint32 exception = 0;\n"
4850 "etiss_uint32 temp = 0;\n"
4851 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4852 #if RISCV64_Pipeline1
4853 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4854 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4855 "etiss_uint32 num_stages = 4;\n"
4856 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4857 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4859 #if RISCV64_Pipeline2
4860 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4861 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4862 "etiss_uint32 num_stages = 4;\n"
4863 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4864 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4867 "etiss_int64 offs = 0;\n"
4868 "etiss_int64 imm_extended = 0;\n"
4870 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4872 "imm_extended = 0;\n"
4873 #if RISCV64_DEBUG_CALL
4874 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4880 "imm_extended = 4294967295;\n"
4881 #if RISCV64_DEBUG_CALL
4882 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4884 "imm_extended = (imm_extended << 32);\n"
4885 #if RISCV64_DEBUG_CALL
4886 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4888 "imm_extended = imm_extended + 4294963200;\n"
4889 #if RISCV64_DEBUG_CALL
4890 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4893 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
4894 #if RISCV64_DEBUG_CALL
4895 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4897 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
4898 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
4900 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
4902 "offs = (etiss_int64)cast_0 + imm_extended;\n"
4903 #if RISCV64_DEBUG_CALL
4904 "printf(\"offs = %#lx\\n\",offs); \n"
4906 "etiss_uint64 MEM_offs;\n"
4907 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
4908 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
4909 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
4910 #if RISCV64_DEBUG_CALL
4911 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
4913 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
4915 "((RISCV64*)cpu)->RES = 0;\n"
4916 #if RISCV64_DEBUG_CALL
4917 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
4924 "return exception;\n"
4955 partInit.
code() = std::string(
"//fld\n")+
4956 "etiss_uint32 exception = 0;\n"
4957 "etiss_uint32 temp = 0;\n"
4958 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
4959 #if RISCV64_Pipeline1
4960 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4961 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4962 "etiss_uint32 num_stages = 4;\n"
4963 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4964 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4966 #if RISCV64_Pipeline2
4967 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
4968 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
4969 "etiss_uint32 num_stages = 4;\n"
4970 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
4971 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
4974 "etiss_int64 offs = 0;\n"
4975 "etiss_int64 imm_extended = 0;\n"
4976 "etiss_uint64 res = 0;\n"
4977 "etiss_int64 upper = 0;\n"
4979 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
4981 "imm_extended = 0;\n"
4982 #if RISCV64_DEBUG_CALL
4983 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4989 "imm_extended = 4294967295;\n"
4990 #if RISCV64_DEBUG_CALL
4991 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
4993 "imm_extended = (imm_extended << 32);\n"
4994 #if RISCV64_DEBUG_CALL
4995 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
4997 "imm_extended = imm_extended + 4294963200;\n"
4998 #if RISCV64_DEBUG_CALL
4999 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5002 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
5003 #if RISCV64_DEBUG_CALL
5004 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5006 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
5007 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
5009 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
5011 "offs = (etiss_int64)cast_0 + imm_extended;\n"
5012 #if RISCV64_DEBUG_CALL
5013 "printf(\"offs = %#lx\\n\",offs); \n"
5015 "etiss_uint64 MEM_offs;\n"
5016 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
5017 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
5019 #if RISCV64_DEBUG_CALL
5020 "printf(\"res = %#lx\\n\",res); \n"
5024 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
5025 #if RISCV64_DEBUG_CALL
5026 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5033 #if RISCV64_DEBUG_CALL
5034 "printf(\"upper = %#lx\\n\",upper); \n"
5036 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
5037 #if RISCV64_DEBUG_CALL
5038 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5044 "return exception;\n"
5078 partInit.
code() = std::string(
"//fsd\n")+
5079 "etiss_uint32 exception = 0;\n"
5080 "etiss_uint32 temp = 0;\n"
5081 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5082 #if RISCV64_Pipeline1
5083 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5084 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5085 "etiss_uint32 num_stages = 4;\n"
5086 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5087 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5089 #if RISCV64_Pipeline2
5090 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5091 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5092 "etiss_uint32 num_stages = 4;\n"
5093 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5094 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5097 "etiss_int64 offs = 0;\n"
5098 "etiss_int64 imm_extended = 0;\n"
5100 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
5102 "imm_extended = 0;\n"
5103 #if RISCV64_DEBUG_CALL
5104 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
5110 "imm_extended = 4294967295;\n"
5111 #if RISCV64_DEBUG_CALL
5112 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
5114 "imm_extended = (imm_extended << 32);\n"
5115 #if RISCV64_DEBUG_CALL
5116 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5118 "imm_extended = imm_extended + 4294963200;\n"
5119 #if RISCV64_DEBUG_CALL
5120 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5123 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
5124 #if RISCV64_DEBUG_CALL
5125 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
5127 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
5128 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
5130 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
5132 "offs = (etiss_int64)cast_0 + imm_extended;\n"
5133 #if RISCV64_DEBUG_CALL
5134 "printf(\"offs = %#lx\\n\",offs); \n"
5136 "etiss_uint64 MEM_offs;\n"
5137 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
5138 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff);\n"
5139 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
5140 #if RISCV64_DEBUG_CALL
5141 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
5143 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
5145 "((RISCV64*)cpu)->RES = 0;\n"
5146 #if RISCV64_DEBUG_CALL
5147 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
5154 "return exception;\n"
5192 partInit.
code() = std::string(
"//fmadd.s\n")+
5193 "etiss_uint32 temp = 0;\n"
5194 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5195 #if RISCV64_Pipeline1
5196 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5197 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5198 "etiss_uint32 num_stages = 4;\n"
5199 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5200 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5202 #if RISCV64_Pipeline2
5203 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5204 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5205 "etiss_uint32 num_stages = 4;\n"
5206 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5207 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5210 "etiss_uint32 res = 0;\n"
5211 "etiss_int64 upper = 0;\n"
5212 "etiss_uint32 flags = 0;\n"
5213 "etiss_uint32 frs1 = 0;\n"
5214 "etiss_uint32 choose1 = 0;\n"
5215 "etiss_uint32 frs2 = 0;\n"
5216 "etiss_uint32 frs3 = 0;\n"
5222 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5223 #if RISCV64_DEBUG_CALL
5224 "printf(\"choose1 = %#x\\n\",choose1); \n"
5230 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5231 #if RISCV64_DEBUG_CALL
5232 "printf(\"choose1 = %#x\\n\",choose1); \n"
5235 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)0, choose1);\n"
5236 #if RISCV64_DEBUG_CALL
5237 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5243 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5244 #if RISCV64_DEBUG_CALL
5245 "printf(\"frs1 = %#x\\n\",frs1); \n"
5247 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5248 #if RISCV64_DEBUG_CALL
5249 "printf(\"frs2 = %#x\\n\",frs2); \n"
5251 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5252 #if RISCV64_DEBUG_CALL
5253 "printf(\"frs3 = %#x\\n\",frs3); \n"
5257 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5258 #if RISCV64_DEBUG_CALL
5259 "printf(\"choose1 = %#x\\n\",choose1); \n"
5265 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5266 #if RISCV64_DEBUG_CALL
5267 "printf(\"choose1 = %#x\\n\",choose1); \n"
5270 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)0, choose1);\n"
5271 #if RISCV64_DEBUG_CALL
5272 "printf(\"res = %#x\\n\",res); \n"
5275 #if RISCV64_DEBUG_CALL
5276 "printf(\"upper = %#lx\\n\",upper); \n"
5278 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5279 #if RISCV64_DEBUG_CALL
5280 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5283 "flags = fget_flags();\n"
5284 #if RISCV64_DEBUG_CALL
5285 "printf(\"flags = %#x\\n\",flags); \n"
5287 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5288 #if RISCV64_DEBUG_CALL
5289 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5331 partInit.
code() = std::string(
"//fmsub.s\n")+
5332 "etiss_uint32 temp = 0;\n"
5333 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5334 #if RISCV64_Pipeline1
5335 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5336 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5337 "etiss_uint32 num_stages = 4;\n"
5338 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5339 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5341 #if RISCV64_Pipeline2
5342 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5343 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5344 "etiss_uint32 num_stages = 4;\n"
5345 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5346 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5349 "etiss_uint32 res = 0;\n"
5350 "etiss_int64 upper = 0;\n"
5351 "etiss_uint32 flags = 0;\n"
5352 "etiss_uint32 frs1 = 0;\n"
5353 "etiss_uint32 choose1 = 0;\n"
5354 "etiss_uint32 frs2 = 0;\n"
5355 "etiss_uint32 frs3 = 0;\n"
5361 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5362 #if RISCV64_DEBUG_CALL
5363 "printf(\"choose1 = %#x\\n\",choose1); \n"
5369 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5370 #if RISCV64_DEBUG_CALL
5371 "printf(\"choose1 = %#x\\n\",choose1); \n"
5374 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)1, choose1);\n"
5375 #if RISCV64_DEBUG_CALL
5376 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5382 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5383 #if RISCV64_DEBUG_CALL
5384 "printf(\"frs1 = %#x\\n\",frs1); \n"
5386 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5387 #if RISCV64_DEBUG_CALL
5388 "printf(\"frs2 = %#x\\n\",frs2); \n"
5390 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5391 #if RISCV64_DEBUG_CALL
5392 "printf(\"frs3 = %#x\\n\",frs3); \n"
5396 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5397 #if RISCV64_DEBUG_CALL
5398 "printf(\"choose1 = %#x\\n\",choose1); \n"
5404 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5405 #if RISCV64_DEBUG_CALL
5406 "printf(\"choose1 = %#x\\n\",choose1); \n"
5409 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)1, choose1);\n"
5410 #if RISCV64_DEBUG_CALL
5411 "printf(\"res = %#x\\n\",res); \n"
5414 #if RISCV64_DEBUG_CALL
5415 "printf(\"upper = %#lx\\n\",upper); \n"
5417 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5418 #if RISCV64_DEBUG_CALL
5419 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5422 "flags = fget_flags();\n"
5423 #if RISCV64_DEBUG_CALL
5424 "printf(\"flags = %#x\\n\",flags); \n"
5426 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5427 #if RISCV64_DEBUG_CALL
5428 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5470 partInit.
code() = std::string(
"//fnmadd.s\n")+
5471 "etiss_uint32 temp = 0;\n"
5472 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5473 #if RISCV64_Pipeline1
5474 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5475 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5476 "etiss_uint32 num_stages = 4;\n"
5477 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5478 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5480 #if RISCV64_Pipeline2
5481 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5482 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5483 "etiss_uint32 num_stages = 4;\n"
5484 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5485 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5488 "etiss_uint32 res = 0;\n"
5489 "etiss_int64 upper = 0;\n"
5490 "etiss_uint32 flags = 0;\n"
5491 "etiss_uint32 frs1 = 0;\n"
5492 "etiss_uint32 choose1 = 0;\n"
5493 "etiss_uint32 frs2 = 0;\n"
5494 "etiss_uint32 frs3 = 0;\n"
5500 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5501 #if RISCV64_DEBUG_CALL
5502 "printf(\"choose1 = %#x\\n\",choose1); \n"
5508 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5509 #if RISCV64_DEBUG_CALL
5510 "printf(\"choose1 = %#x\\n\",choose1); \n"
5513 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)2, choose1);\n"
5514 #if RISCV64_DEBUG_CALL
5515 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5521 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5522 #if RISCV64_DEBUG_CALL
5523 "printf(\"frs1 = %#x\\n\",frs1); \n"
5525 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5526 #if RISCV64_DEBUG_CALL
5527 "printf(\"frs2 = %#x\\n\",frs2); \n"
5529 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5530 #if RISCV64_DEBUG_CALL
5531 "printf(\"frs3 = %#x\\n\",frs3); \n"
5535 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5536 #if RISCV64_DEBUG_CALL
5537 "printf(\"choose1 = %#x\\n\",choose1); \n"
5543 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5544 #if RISCV64_DEBUG_CALL
5545 "printf(\"choose1 = %#x\\n\",choose1); \n"
5548 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)2, choose1);\n"
5549 #if RISCV64_DEBUG_CALL
5550 "printf(\"res = %#x\\n\",res); \n"
5553 #if RISCV64_DEBUG_CALL
5554 "printf(\"upper = %#lx\\n\",upper); \n"
5556 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5557 #if RISCV64_DEBUG_CALL
5558 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5561 "flags = fget_flags();\n"
5562 #if RISCV64_DEBUG_CALL
5563 "printf(\"flags = %#x\\n\",flags); \n"
5565 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5566 #if RISCV64_DEBUG_CALL
5567 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5609 partInit.
code() = std::string(
"//fnmsub.s\n")+
5610 "etiss_uint32 temp = 0;\n"
5611 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5612 #if RISCV64_Pipeline1
5613 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5614 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5615 "etiss_uint32 num_stages = 4;\n"
5616 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5617 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5619 #if RISCV64_Pipeline2
5620 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5621 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5622 "etiss_uint32 num_stages = 4;\n"
5623 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5624 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5627 "etiss_uint32 res = 0;\n"
5628 "etiss_int64 upper = 0;\n"
5629 "etiss_uint32 flags = 0;\n"
5630 "etiss_uint32 frs1 = 0;\n"
5631 "etiss_uint32 choose1 = 0;\n"
5632 "etiss_uint32 frs2 = 0;\n"
5633 "etiss_uint32 frs3 = 0;\n"
5639 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5640 #if RISCV64_DEBUG_CALL
5641 "printf(\"choose1 = %#x\\n\",choose1); \n"
5647 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5648 #if RISCV64_DEBUG_CALL
5649 "printf(\"choose1 = %#x\\n\",choose1); \n"
5652 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], ((RISCV64*)cpu)->F[" +
toString(rs3) +
"], (etiss_uint32)3, choose1);\n"
5653 #if RISCV64_DEBUG_CALL
5654 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5660 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
5661 #if RISCV64_DEBUG_CALL
5662 "printf(\"frs1 = %#x\\n\",frs1); \n"
5664 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
5665 #if RISCV64_DEBUG_CALL
5666 "printf(\"frs2 = %#x\\n\",frs2); \n"
5668 "frs3 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs3) +
"]);\n"
5669 #if RISCV64_DEBUG_CALL
5670 "printf(\"frs3 = %#x\\n\",frs3); \n"
5674 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5675 #if RISCV64_DEBUG_CALL
5676 "printf(\"choose1 = %#x\\n\",choose1); \n"
5682 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5683 #if RISCV64_DEBUG_CALL
5684 "printf(\"choose1 = %#x\\n\",choose1); \n"
5687 "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)3, choose1);\n"
5688 #if RISCV64_DEBUG_CALL
5689 "printf(\"res = %#x\\n\",res); \n"
5692 #if RISCV64_DEBUG_CALL
5693 "printf(\"upper = %#lx\\n\",upper); \n"
5695 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
5696 #if RISCV64_DEBUG_CALL
5697 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5700 "flags = fget_flags();\n"
5701 #if RISCV64_DEBUG_CALL
5702 "printf(\"flags = %#x\\n\",flags); \n"
5704 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5705 #if RISCV64_DEBUG_CALL
5706 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5748 partInit.
code() = std::string(
"//fmadd.d\n")+
5749 "etiss_uint32 temp = 0;\n"
5750 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5751 #if RISCV64_Pipeline1
5752 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5753 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5754 "etiss_uint32 num_stages = 4;\n"
5755 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5756 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5758 #if RISCV64_Pipeline2
5759 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5760 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5761 "etiss_uint32 num_stages = 4;\n"
5762 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5763 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5766 "etiss_uint64 res = 0;\n"
5767 "etiss_int64 upper = 0;\n"
5768 "etiss_uint32 flags = 0;\n"
5769 "etiss_uint32 choose1 = 0;\n"
5773 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5774 #if RISCV64_DEBUG_CALL
5775 "printf(\"choose1 = %#x\\n\",choose1); \n"
5781 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5782 #if RISCV64_DEBUG_CALL
5783 "printf(\"choose1 = %#x\\n\",choose1); \n"
5786 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint64)0, choose1);\n"
5787 #if RISCV64_DEBUG_CALL
5788 "printf(\"res = %#lx\\n\",res); \n"
5792 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
5793 #if RISCV64_DEBUG_CALL
5794 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5801 #if RISCV64_DEBUG_CALL
5802 "printf(\"upper = %#lx\\n\",upper); \n"
5804 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
5805 #if RISCV64_DEBUG_CALL
5806 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5809 "flags = fget_flags();\n"
5810 #if RISCV64_DEBUG_CALL
5811 "printf(\"flags = %#x\\n\",flags); \n"
5813 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5814 #if RISCV64_DEBUG_CALL
5815 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5857 partInit.
code() = std::string(
"//fmsub.d\n")+
5858 "etiss_uint32 temp = 0;\n"
5859 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5860 #if RISCV64_Pipeline1
5861 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5862 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5863 "etiss_uint32 num_stages = 4;\n"
5864 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5865 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5867 #if RISCV64_Pipeline2
5868 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5869 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5870 "etiss_uint32 num_stages = 4;\n"
5871 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5872 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5875 "etiss_uint64 res = 0;\n"
5876 "etiss_int64 upper = 0;\n"
5877 "etiss_uint32 flags = 0;\n"
5878 "etiss_uint32 choose1 = 0;\n"
5882 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5883 #if RISCV64_DEBUG_CALL
5884 "printf(\"choose1 = %#x\\n\",choose1); \n"
5890 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
5891 #if RISCV64_DEBUG_CALL
5892 "printf(\"choose1 = %#x\\n\",choose1); \n"
5895 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint32)1, choose1);\n"
5896 #if RISCV64_DEBUG_CALL
5897 "printf(\"res = %#lx\\n\",res); \n"
5901 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
5902 #if RISCV64_DEBUG_CALL
5903 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5910 #if RISCV64_DEBUG_CALL
5911 "printf(\"upper = %#lx\\n\",upper); \n"
5913 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
5914 #if RISCV64_DEBUG_CALL
5915 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
5918 "flags = fget_flags();\n"
5919 #if RISCV64_DEBUG_CALL
5920 "printf(\"flags = %#x\\n\",flags); \n"
5922 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
5923 #if RISCV64_DEBUG_CALL
5924 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
5966 partInit.
code() = std::string(
"//fnmadd.d\n")+
5967 "etiss_uint32 temp = 0;\n"
5968 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
5969 #if RISCV64_Pipeline1
5970 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5971 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5972 "etiss_uint32 num_stages = 4;\n"
5973 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5974 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5976 #if RISCV64_Pipeline2
5977 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
5978 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
5979 "etiss_uint32 num_stages = 4;\n"
5980 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
5981 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
5984 "etiss_uint64 res = 0;\n"
5985 "etiss_int64 upper = 0;\n"
5986 "etiss_uint32 flags = 0;\n"
5987 "etiss_uint32 choose1 = 0;\n"
5991 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
5992 #if RISCV64_DEBUG_CALL
5993 "printf(\"choose1 = %#x\\n\",choose1); \n"
5999 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
6000 #if RISCV64_DEBUG_CALL
6001 "printf(\"choose1 = %#x\\n\",choose1); \n"
6004 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint32)2, choose1);\n"
6005 #if RISCV64_DEBUG_CALL
6006 "printf(\"res = %#lx\\n\",res); \n"
6010 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
6011 #if RISCV64_DEBUG_CALL
6012 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6019 #if RISCV64_DEBUG_CALL
6020 "printf(\"upper = %#lx\\n\",upper); \n"
6022 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
6023 #if RISCV64_DEBUG_CALL
6024 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6027 "flags = fget_flags();\n"
6028 #if RISCV64_DEBUG_CALL
6029 "printf(\"flags = %#x\\n\",flags); \n"
6031 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
6032 #if RISCV64_DEBUG_CALL
6033 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
6075 partInit.
code() = std::string(
"//fnmsub.d\n")+
6076 "etiss_uint32 temp = 0;\n"
6077 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6078 #if RISCV64_Pipeline1
6079 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6080 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6081 "etiss_uint32 num_stages = 4;\n"
6082 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6083 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6085 #if RISCV64_Pipeline2
6086 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6087 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6088 "etiss_uint32 num_stages = 4;\n"
6089 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6090 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6093 "etiss_uint64 res = 0;\n"
6094 "etiss_int64 upper = 0;\n"
6095 "etiss_uint32 flags = 0;\n"
6096 "etiss_uint32 choose1 = 0;\n"
6100 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
6101 #if RISCV64_DEBUG_CALL
6102 "printf(\"choose1 = %#x\\n\",choose1); \n"
6108 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
6109 #if RISCV64_DEBUG_CALL
6110 "printf(\"choose1 = %#x\\n\",choose1); \n"
6113 "res = fmadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs3) +
"] & 0xffffffffffffffff), (etiss_uint32)3, choose1);\n"
6114 #if RISCV64_DEBUG_CALL
6115 "printf(\"res = %#lx\\n\",res); \n"
6119 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
6120 #if RISCV64_DEBUG_CALL
6121 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6128 #if RISCV64_DEBUG_CALL
6129 "printf(\"upper = %#lx\\n\",upper); \n"
6131 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
6132 #if RISCV64_DEBUG_CALL
6133 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
6136 "flags = fget_flags();\n"
6137 #if RISCV64_DEBUG_CALL
6138 "printf(\"flags = %#x\\n\",flags); \n"
6140 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
6141 #if RISCV64_DEBUG_CALL
6142 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
6177 partInit.
code() = std::string(
"//slli\n")+
6178 "etiss_uint32 temp = 0;\n"
6179 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6180 #if RISCV64_Pipeline1
6181 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6182 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6183 "etiss_uint32 num_stages = 4;\n"
6184 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6185 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6187 #if RISCV64_Pipeline2
6188 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6189 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6190 "etiss_uint32 num_stages = 4;\n"
6191 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6192 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6199 #if RISCV64_DEBUG_CALL
6200 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6237 partInit.
code() = std::string(
"//srli\n")+
6238 "etiss_uint32 temp = 0;\n"
6239 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6240 #if RISCV64_Pipeline1
6241 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6242 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6243 "etiss_uint32 num_stages = 4;\n"
6244 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6245 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6247 #if RISCV64_Pipeline2
6248 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6249 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6250 "etiss_uint32 num_stages = 4;\n"
6251 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6252 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6259 #if RISCV64_DEBUG_CALL
6260 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6297 partInit.
code() = std::string(
"//srai\n")+
6298 "etiss_uint32 temp = 0;\n"
6299 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6300 #if RISCV64_Pipeline1
6301 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6302 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6303 "etiss_uint32 num_stages = 4;\n"
6304 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6305 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6307 #if RISCV64_Pipeline2
6308 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6309 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6310 "etiss_uint32 num_stages = 4;\n"
6311 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6312 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6318 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
6319 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
6321 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
6323 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 >> " +
toString(shamt) +
");\n"
6324 #if RISCV64_DEBUG_CALL
6325 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6363 partInit.
code() = std::string(
"//add\n")+
6364 "etiss_uint32 temp = 0;\n"
6365 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6366 #if RISCV64_Pipeline1
6367 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6368 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6369 "etiss_uint32 num_stages = 4;\n"
6370 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6371 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6373 #if RISCV64_Pipeline2
6374 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6375 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6376 "etiss_uint32 num_stages = 4;\n"
6377 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6378 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6384 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"] + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
6385 #if RISCV64_DEBUG_CALL
6386 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6424 partInit.
code() = std::string(
"//addw\n")+
6425 "etiss_uint32 temp = 0;\n"
6426 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6427 #if RISCV64_Pipeline1
6428 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6429 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6430 "etiss_uint32 num_stages = 4;\n"
6431 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6432 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6434 #if RISCV64_Pipeline2
6435 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6436 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6437 "etiss_uint32 num_stages = 4;\n"
6438 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6439 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6442 "etiss_uint32 res = 0;\n"
6446 "res = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) + (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff);\n"
6447 #if RISCV64_DEBUG_CALL
6448 "printf(\"res = %#x\\n\",res); \n"
6450 "etiss_int32 cast_0 = res; \n"
6451 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
6453 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
6455 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
6456 #if RISCV64_DEBUG_CALL
6457 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6495 partInit.
code() = std::string(
"//sll\n")+
6496 "etiss_uint32 temp = 0;\n"
6497 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6498 #if RISCV64_Pipeline1
6499 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6500 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {4, 5}, {6, 7}};\n"
6501 "etiss_uint32 num_stages = 4;\n"
6502 "etiss_uint32 num_resources[100] = {2, 1, 2, 2};\n"
6503 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6505 #if RISCV64_Pipeline2
6506 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6507 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {4, 5}, {6, 7}};\n"
6508 "etiss_uint32 num_stages = 4;\n"
6509 "etiss_uint32 num_resources[100] = {2, 1, 2, 2};\n"
6510 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6516 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] << (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 64 - 1));\n"
6517 #if RISCV64_DEBUG_CALL
6518 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6555 partInit.
code() = std::string(
"//slliw\n")+
6556 "etiss_uint32 temp = 0;\n"
6557 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6558 #if RISCV64_Pipeline1
6559 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6560 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6561 "etiss_uint32 num_stages = 4;\n"
6562 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6563 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6565 #if RISCV64_Pipeline2
6566 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6567 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6568 "etiss_uint32 num_stages = 4;\n"
6569 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6570 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6573 "etiss_uint32 sh_val = 0;\n"
6577 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) << " +
toString(shamt) +
");\n"
6578 #if RISCV64_DEBUG_CALL
6579 "printf(\"sh_val = %#x\\n\",sh_val); \n"
6581 "etiss_int32 cast_0 = sh_val; \n"
6582 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
6584 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
6586 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
6587 #if RISCV64_DEBUG_CALL
6588 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6626 partInit.
code() = std::string(
"//sllw\n")+
6627 "etiss_uint32 temp = 0;\n"
6628 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6629 #if RISCV64_Pipeline1
6630 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6631 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6632 "etiss_uint32 num_stages = 4;\n"
6633 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6634 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6636 #if RISCV64_Pipeline2
6637 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6638 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6639 "etiss_uint32 num_stages = 4;\n"
6640 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6641 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6644 "etiss_uint32 sh_val = 0;\n"
6645 "etiss_uint32 count = 0;\n"
6646 "etiss_int32 mask = 0;\n"
6651 #if RISCV64_DEBUG_CALL
6652 "printf(\"mask = %#x\\n\",mask); \n"
6654 "count = ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) & mask);\n"
6655 #if RISCV64_DEBUG_CALL
6656 "printf(\"count = %#x\\n\",count); \n"
6658 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) << count);\n"
6659 #if RISCV64_DEBUG_CALL
6660 "printf(\"sh_val = %#x\\n\",sh_val); \n"
6662 "etiss_int32 cast_0 = sh_val; \n"
6663 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
6665 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
6667 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
6668 #if RISCV64_DEBUG_CALL
6669 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6707 partInit.
code() = std::string(
"//slt\n")+
6708 "etiss_uint32 temp = 0;\n"
6709 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6710 #if RISCV64_Pipeline1
6711 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6712 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6713 "etiss_uint32 num_stages = 4;\n"
6714 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6715 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6717 #if RISCV64_Pipeline2
6718 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6719 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6720 "etiss_uint32 num_stages = 4;\n"
6721 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6722 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6725 "etiss_int8 choose1 = 0;\n"
6729 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
6730 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
6732 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
6734 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
6735 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
6737 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
6739 "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n"
6742 #if RISCV64_DEBUG_CALL
6743 "printf(\"choose1 = %#x\\n\",choose1); \n"
6750 #if RISCV64_DEBUG_CALL
6751 "printf(\"choose1 = %#x\\n\",choose1); \n"
6754 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
6755 #if RISCV64_DEBUG_CALL
6756 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6794 partInit.
code() = std::string(
"//sltu\n")+
6795 "etiss_uint32 temp = 0;\n"
6796 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6797 #if RISCV64_Pipeline1
6798 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6799 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6800 "etiss_uint32 num_stages = 4;\n"
6801 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6802 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6804 #if RISCV64_Pipeline2
6805 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6806 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6807 "etiss_uint32 num_stages = 4;\n"
6808 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6809 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6812 "etiss_int8 choose1 = 0;\n"
6816 "if((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] < (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
6819 #if RISCV64_DEBUG_CALL
6820 "printf(\"choose1 = %#x\\n\",choose1); \n"
6827 #if RISCV64_DEBUG_CALL
6828 "printf(\"choose1 = %#x\\n\",choose1); \n"
6831 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = choose1;\n"
6832 #if RISCV64_DEBUG_CALL
6833 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6871 partInit.
code() = std::string(
"//xor\n")+
6872 "etiss_uint32 temp = 0;\n"
6873 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6874 #if RISCV64_Pipeline1
6875 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6876 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6877 "etiss_uint32 num_stages = 4;\n"
6878 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6879 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6881 #if RISCV64_Pipeline2
6882 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6883 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6884 "etiss_uint32 num_stages = 4;\n"
6885 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6886 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6892 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
6893 #if RISCV64_DEBUG_CALL
6894 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6932 partInit.
code() = std::string(
"//srl\n")+
6933 "etiss_uint32 temp = 0;\n"
6934 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6935 #if RISCV64_Pipeline1
6936 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6937 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6938 "etiss_uint32 num_stages = 4;\n"
6939 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6940 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6942 #if RISCV64_Pipeline2
6943 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6944 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6945 "etiss_uint32 num_stages = 4;\n"
6946 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
6947 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
6953 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] >> (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 64 - 1));\n"
6954 #if RISCV64_DEBUG_CALL
6955 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
6992 partInit.
code() = std::string(
"//srliw\n")+
6993 "etiss_uint32 temp = 0;\n"
6994 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
6995 #if RISCV64_Pipeline1
6996 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
6997 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
6998 "etiss_uint32 num_stages = 4;\n"
6999 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7000 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7002 #if RISCV64_Pipeline2
7003 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7004 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7005 "etiss_uint32 num_stages = 4;\n"
7006 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7007 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7010 "etiss_uint32 sh_val = 0;\n"
7014 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) >> " +
toString(shamt) +
");\n"
7015 #if RISCV64_DEBUG_CALL
7016 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7018 "etiss_int32 cast_0 = sh_val; \n"
7019 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
7021 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
7023 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
7024 #if RISCV64_DEBUG_CALL
7025 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7063 partInit.
code() = std::string(
"//srlw\n")+
7064 "etiss_uint32 temp = 0;\n"
7065 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7066 #if RISCV64_Pipeline1
7067 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7068 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7069 "etiss_uint32 num_stages = 4;\n"
7070 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7071 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7073 #if RISCV64_Pipeline2
7074 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7075 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7076 "etiss_uint32 num_stages = 4;\n"
7077 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7078 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7081 "etiss_uint32 sh_val = 0;\n"
7082 "etiss_uint32 count = 0;\n"
7083 "etiss_int32 mask = 0;\n"
7088 #if RISCV64_DEBUG_CALL
7089 "printf(\"mask = %#x\\n\",mask); \n"
7091 "count = ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) & mask);\n"
7092 #if RISCV64_DEBUG_CALL
7093 "printf(\"count = %#x\\n\",count); \n"
7095 "sh_val = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) >> count);\n"
7096 #if RISCV64_DEBUG_CALL
7097 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7099 "etiss_int32 cast_0 = sh_val; \n"
7100 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
7102 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
7104 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
7105 #if RISCV64_DEBUG_CALL
7106 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7144 partInit.
code() = std::string(
"//or\n")+
7145 "etiss_uint32 temp = 0;\n"
7146 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7147 #if RISCV64_Pipeline1
7148 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7149 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7150 "etiss_uint32 num_stages = 4;\n"
7151 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7152 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7154 #if RISCV64_Pipeline2
7155 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7156 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7157 "etiss_uint32 num_stages = 4;\n"
7158 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7159 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7165 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] | *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
7166 #if RISCV64_DEBUG_CALL
7167 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7205 partInit.
code() = std::string(
"//and\n")+
7206 "etiss_uint32 temp = 0;\n"
7207 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7208 #if RISCV64_Pipeline1
7209 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7210 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7211 "etiss_uint32 num_stages = 4;\n"
7212 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7213 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7215 #if RISCV64_Pipeline2
7216 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7217 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7218 "etiss_uint32 num_stages = 4;\n"
7219 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7220 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7226 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
7227 #if RISCV64_DEBUG_CALL
7228 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7251 partInit.
code() = std::string(
"//uret\n")+
7252 "etiss_uint32 temp = 0;\n"
7253 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7255 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7256 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7257 "etiss_uint32 num_stages = 4;\n"
7258 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7259 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7262 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7263 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7264 "etiss_uint32 num_stages = 4;\n"
7265 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7266 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7270 "((RISCV64*)cpu)->CSR[3088] = 0;\n"
7271 "((RISCV64*)cpu)->CSR[0] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[0] & 0x10)>>4)) ^ (((RISCV64*)cpu)->CSR[0] & 0x1);\n"
7272 "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[65];\n"
7273 "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[0];\n"
7274 "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[0];\n"
7276 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
7312 partInit.
code() = std::string(
"//fadd.s\n")+
7313 "etiss_uint32 temp = 0;\n"
7314 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7315 #if RISCV64_Pipeline1
7316 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7317 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7318 "etiss_uint32 num_stages = 4;\n"
7319 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7320 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7322 #if RISCV64_Pipeline2
7323 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7324 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7325 "etiss_uint32 num_stages = 4;\n"
7326 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7327 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7330 "etiss_uint32 res = 0;\n"
7331 "etiss_int64 upper = 0;\n"
7332 "etiss_uint32 flags = 0;\n"
7333 "etiss_uint32 frs1 = 0;\n"
7334 "etiss_uint32 choose1 = 0;\n"
7335 "etiss_uint32 frs2 = 0;\n"
7341 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
7342 #if RISCV64_DEBUG_CALL
7343 "printf(\"choose1 = %#x\\n\",choose1); \n"
7349 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
7350 #if RISCV64_DEBUG_CALL
7351 "printf(\"choose1 = %#x\\n\",choose1); \n"
7354 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fadd_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
7355 #if RISCV64_DEBUG_CALL
7356 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
7362 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
7363 #if RISCV64_DEBUG_CALL
7364 "printf(\"frs1 = %#x\\n\",frs1); \n"
7366 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
7367 #if RISCV64_DEBUG_CALL
7368 "printf(\"frs2 = %#x\\n\",frs2); \n"
7372 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
7373 #if RISCV64_DEBUG_CALL
7374 "printf(\"choose1 = %#x\\n\",choose1); \n"
7380 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
7381 #if RISCV64_DEBUG_CALL
7382 "printf(\"choose1 = %#x\\n\",choose1); \n"
7385 "res = fadd_s(frs1, frs2, choose1);\n"
7386 #if RISCV64_DEBUG_CALL
7387 "printf(\"res = %#x\\n\",res); \n"
7390 #if RISCV64_DEBUG_CALL
7391 "printf(\"upper = %#lx\\n\",upper); \n"
7393 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
7394 #if RISCV64_DEBUG_CALL
7395 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
7398 "flags = fget_flags();\n"
7399 #if RISCV64_DEBUG_CALL
7400 "printf(\"flags = %#x\\n\",flags); \n"
7402 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
7403 #if RISCV64_DEBUG_CALL
7404 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
7440 partInit.
code() = std::string(
"//sub\n")+
7441 "etiss_uint32 temp = 0;\n"
7442 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7443 #if RISCV64_Pipeline1
7444 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7445 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7446 "etiss_uint32 num_stages = 4;\n"
7447 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7448 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7450 #if RISCV64_Pipeline2
7451 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7452 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7453 "etiss_uint32 num_stages = 4;\n"
7454 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7455 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7461 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"] - *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
7462 #if RISCV64_DEBUG_CALL
7463 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7501 partInit.
code() = std::string(
"//subw\n")+
7502 "etiss_uint32 temp = 0;\n"
7503 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7504 #if RISCV64_Pipeline1
7505 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7506 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7507 "etiss_uint32 num_stages = 4;\n"
7508 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7509 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7511 #if RISCV64_Pipeline2
7512 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7513 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7514 "etiss_uint32 num_stages = 4;\n"
7515 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7516 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7519 "etiss_uint32 res = 0;\n"
7523 "res = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) - (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff);\n"
7524 #if RISCV64_DEBUG_CALL
7525 "printf(\"res = %#x\\n\",res); \n"
7527 "etiss_int32 cast_0 = res; \n"
7528 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
7530 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
7532 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
7533 #if RISCV64_DEBUG_CALL
7534 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7572 partInit.
code() = std::string(
"//sra\n")+
7573 "etiss_uint32 temp = 0;\n"
7574 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7575 #if RISCV64_Pipeline1
7576 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7577 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7578 "etiss_uint32 num_stages = 4;\n"
7579 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7580 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7582 #if RISCV64_Pipeline2
7583 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7584 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7585 "etiss_uint32 num_stages = 4;\n"
7586 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7587 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7593 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
7594 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
7596 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
7598 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_0 >> (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 64 - 1));\n"
7599 #if RISCV64_DEBUG_CALL
7600 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7637 partInit.
code() = std::string(
"//sraiw\n")+
7638 "etiss_uint32 temp = 0;\n"
7639 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7640 #if RISCV64_Pipeline1
7641 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7642 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7643 "etiss_uint32 num_stages = 4;\n"
7644 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7645 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7647 #if RISCV64_Pipeline2
7648 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7649 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7650 "etiss_uint32 num_stages = 4;\n"
7651 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7652 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7655 "etiss_int32 sh_val = 0;\n"
7659 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
7660 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
7662 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
7664 "sh_val = ((etiss_int32)cast_0 >> " +
toString(shamt) +
");\n"
7665 #if RISCV64_DEBUG_CALL
7666 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7668 "etiss_int32 cast_1 = sh_val; \n"
7669 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
7671 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
7673 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
7674 #if RISCV64_DEBUG_CALL
7675 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7713 partInit.
code() = std::string(
"//sraw\n")+
7714 "etiss_uint32 temp = 0;\n"
7715 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7716 #if RISCV64_Pipeline1
7717 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7718 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7719 "etiss_uint32 num_stages = 4;\n"
7720 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7721 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7723 #if RISCV64_Pipeline2
7724 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7725 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7726 "etiss_uint32 num_stages = 4;\n"
7727 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7728 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7731 "etiss_uint32 sh_val = 0;\n"
7732 "etiss_uint32 count = 0;\n"
7733 "etiss_int32 mask = 0;\n"
7738 #if RISCV64_DEBUG_CALL
7739 "printf(\"mask = %#x\\n\",mask); \n"
7741 "count = ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) & mask);\n"
7742 #if RISCV64_DEBUG_CALL
7743 "printf(\"count = %#x\\n\",count); \n"
7745 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
7746 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
7748 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
7750 "sh_val = ((etiss_int32)cast_0 >> count);\n"
7751 #if RISCV64_DEBUG_CALL
7752 "printf(\"sh_val = %#x\\n\",sh_val); \n"
7754 "etiss_int32 cast_1 = sh_val; \n"
7755 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
7757 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
7759 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
7760 #if RISCV64_DEBUG_CALL
7761 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
7797 partInit.
code() = std::string(
"//fcvt.s.d\n")+
7798 "etiss_uint32 temp = 0;\n"
7799 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7800 #if RISCV64_Pipeline1
7801 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7802 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7803 "etiss_uint32 num_stages = 4;\n"
7804 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7805 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7807 #if RISCV64_Pipeline2
7808 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7809 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7810 "etiss_uint32 num_stages = 4;\n"
7811 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7812 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7815 "etiss_uint32 res = 0;\n"
7816 "etiss_int64 upper = 0;\n"
7818 "res = fconv_d2f(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], (" +
toString(rm) +
" & 0xff));\n"
7819 #if RISCV64_DEBUG_CALL
7820 "printf(\"res = %#x\\n\",res); \n"
7823 #if RISCV64_DEBUG_CALL
7824 "printf(\"upper = %#lx\\n\",upper); \n"
7826 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
7827 #if RISCV64_DEBUG_CALL
7828 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
7866 partInit.
code() = std::string(
"//fence\n")+
7867 "etiss_uint32 temp = 0;\n"
7868 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7869 #if RISCV64_Pipeline1
7870 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7871 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7872 "etiss_uint32 num_stages = 4;\n"
7873 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7874 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7876 #if RISCV64_Pipeline2
7877 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7878 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7879 "etiss_uint32 num_stages = 4;\n"
7880 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7881 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7885 "((RISCV64*)cpu)->FENCE[0] = ((" +
toString(pred) +
" << 4) | " +
toString(succ) +
");\n"
7886 #if RISCV64_DEBUG_CALL
7887 "printf(\"((RISCV64*)cpu)->FENCE[0] = %#lx\\n\",((RISCV64*)cpu)->FENCE[0]); \n"
7908 partInit.
code() = std::string(
"//ecall\n")+
7909 "etiss_uint32 exception = 0;\n"
7910 "etiss_uint32 temp = 0;\n"
7911 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7913 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7914 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7915 "etiss_uint32 num_stages = 4;\n"
7916 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7917 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7920 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7921 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7922 "etiss_uint32 num_stages = 4;\n"
7923 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7924 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7928 "exception = ETISS_RETURNCODE_SYSCALL; \n"
7932 "return exception;\n"
7949 partInit.
code() = std::string(
"//ebreak\n")+
7950 "etiss_uint32 exception = 0;\n"
7951 "etiss_uint32 temp = 0;\n"
7952 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7954 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7955 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7956 "etiss_uint32 num_stages = 4;\n"
7957 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7958 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7961 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7962 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7963 "etiss_uint32 num_stages = 4;\n"
7964 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7965 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
7969 "return ETISS_RETURNCODE_CPUFINISHED; \n"
7973 "return exception;\n"
7990 partInit.
code() = std::string(
"//sret\n")+
7991 "etiss_uint32 temp = 0;\n"
7992 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
7994 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
7995 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
7996 "etiss_uint32 num_stages = 4;\n"
7997 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
7998 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8001 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8002 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8003 "etiss_uint32 num_stages = 4;\n"
8004 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8005 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8009 "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[256] & 0x100)>>8;\n"
8010 "((RISCV64*)cpu)->CSR[256] ^= (((RISCV64*)cpu)->CSR[256] & 0x100);\n"
8011 "((RISCV64*)cpu)->CSR[256] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[256] & 0x20)>>4)) ^ (((RISCV64*)cpu)->CSR[256] & 0x2);\n"
8012 "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[321];\n"
8013 "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[256];\n"
8014 "((RISCV64*)cpu)->CSR[0]=((RISCV64*)cpu)->CSR[256];\n"
8016 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
8035 partInit.
code() = std::string(
"//wfi\n")+
8036 "etiss_uint32 exception = 0;\n"
8037 "etiss_uint32 temp = 0;\n"
8038 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8040 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8041 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8042 "etiss_uint32 num_stages = 4;\n"
8043 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8044 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8047 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8048 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8049 "etiss_uint32 num_stages = 4;\n"
8050 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8051 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8055 "return ETISS_RETURNCODE_CPUFINISHED; \n"
8059 "return exception;\n"
8093 partInit.
code() = std::string(
"//fmul.s\n")+
8094 "etiss_uint32 temp = 0;\n"
8095 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8096 #if RISCV64_Pipeline1
8097 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8098 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8099 "etiss_uint32 num_stages = 4;\n"
8100 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8101 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8103 #if RISCV64_Pipeline2
8104 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8105 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8106 "etiss_uint32 num_stages = 4;\n"
8107 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8108 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8111 "etiss_uint32 res = 0;\n"
8112 "etiss_int64 upper = 0;\n"
8113 "etiss_uint32 flags = 0;\n"
8114 "etiss_uint32 frs1 = 0;\n"
8115 "etiss_uint32 choose1 = 0;\n"
8116 "etiss_uint32 frs2 = 0;\n"
8122 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
8123 #if RISCV64_DEBUG_CALL
8124 "printf(\"choose1 = %#x\\n\",choose1); \n"
8130 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
8131 #if RISCV64_DEBUG_CALL
8132 "printf(\"choose1 = %#x\\n\",choose1); \n"
8135 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fmul_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
8136 #if RISCV64_DEBUG_CALL
8137 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8143 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
8144 #if RISCV64_DEBUG_CALL
8145 "printf(\"frs1 = %#x\\n\",frs1); \n"
8147 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
8148 #if RISCV64_DEBUG_CALL
8149 "printf(\"frs2 = %#x\\n\",frs2); \n"
8153 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
8154 #if RISCV64_DEBUG_CALL
8155 "printf(\"choose1 = %#x\\n\",choose1); \n"
8161 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
8162 #if RISCV64_DEBUG_CALL
8163 "printf(\"choose1 = %#x\\n\",choose1); \n"
8166 "res = fmul_s(frs1, frs2, choose1);\n"
8167 #if RISCV64_DEBUG_CALL
8168 "printf(\"res = %#x\\n\",res); \n"
8171 #if RISCV64_DEBUG_CALL
8172 "printf(\"upper = %#lx\\n\",upper); \n"
8174 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
8175 #if RISCV64_DEBUG_CALL
8176 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8179 "flags = fget_flags();\n"
8180 #if RISCV64_DEBUG_CALL
8181 "printf(\"flags = %#x\\n\",flags); \n"
8183 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
8184 #if RISCV64_DEBUG_CALL
8185 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
8206 partInit.
code() = std::string(
"//mret\n")+
8207 "etiss_uint32 temp = 0;\n"
8208 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8210 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8211 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8212 "etiss_uint32 num_stages = 4;\n"
8213 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8214 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8217 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8218 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8219 "etiss_uint32 num_stages = 4;\n"
8220 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8221 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8225 "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[768] & 0x1800)>>11;\n"
8226 "((RISCV64*)cpu)->CSR[768] ^= (((RISCV64*)cpu)->CSR[768] & 0x1800);\n"
8227 "((RISCV64*)cpu)->CSR[768] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[768] & 0x80)>>4)) ^ (((RISCV64*)cpu)->CSR[768] & 0x8);\n"
8228 "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[833];\n"
8229 "((RISCV64*)cpu)->CSR[0]= ((RISCV64*)cpu)->CSR[768];\n"
8230 "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[768];\n"
8232 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
8261 partInit.
code() = std::string(
"//sfence.vma\n")+
8262 "etiss_uint32 temp = 0;\n"
8263 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8264 #if RISCV64_Pipeline1
8265 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8266 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8267 "etiss_uint32 num_stages = 4;\n"
8268 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8269 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8271 #if RISCV64_Pipeline2
8272 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8273 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8274 "etiss_uint32 num_stages = 4;\n"
8275 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8276 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8280 "((RISCV64*)cpu)->FENCE[2] = " +
toString(rs1) +
";\n"
8281 #if RISCV64_DEBUG_CALL
8282 "printf(\"((RISCV64*)cpu)->FENCE[2] = %#lx\\n\",((RISCV64*)cpu)->FENCE[2]); \n"
8284 "((RISCV64*)cpu)->FENCE[3] = " +
toString(rs2) +
";\n"
8285 #if RISCV64_DEBUG_CALL
8286 "printf(\"((RISCV64*)cpu)->FENCE[3] = %#lx\\n\",((RISCV64*)cpu)->FENCE[3]); \n"
8324 partInit.
code() = std::string(
"//fmul.d\n")+
8325 "etiss_uint32 temp = 0;\n"
8326 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8327 #if RISCV64_Pipeline1
8328 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8329 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8330 "etiss_uint32 num_stages = 4;\n"
8331 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8332 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8334 #if RISCV64_Pipeline2
8335 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8336 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8337 "etiss_uint32 num_stages = 4;\n"
8338 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8339 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8342 "etiss_uint64 res = 0;\n"
8343 "etiss_int64 upper = 0;\n"
8344 "etiss_uint32 flags = 0;\n"
8345 "etiss_uint32 choose1 = 0;\n"
8349 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
8350 #if RISCV64_DEBUG_CALL
8351 "printf(\"choose1 = %#x\\n\",choose1); \n"
8357 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
8358 #if RISCV64_DEBUG_CALL
8359 "printf(\"choose1 = %#x\\n\",choose1); \n"
8362 "res = fmul_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
8363 #if RISCV64_DEBUG_CALL
8364 "printf(\"res = %#lx\\n\",res); \n"
8368 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
8369 #if RISCV64_DEBUG_CALL
8370 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8377 #if RISCV64_DEBUG_CALL
8378 "printf(\"upper = %#lx\\n\",upper); \n"
8380 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
8381 #if RISCV64_DEBUG_CALL
8382 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
8385 "flags = fget_flags();\n"
8386 #if RISCV64_DEBUG_CALL
8387 "printf(\"flags = %#x\\n\",flags); \n"
8389 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
8390 #if RISCV64_DEBUG_CALL
8391 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
8427 partInit.
code() = std::string(
"//mul\n")+
8428 "etiss_uint32 temp = 0;\n"
8429 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8430 #if RISCV64_Pipeline1
8431 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8432 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {3}, {6, 7}};\n"
8433 "etiss_uint32 num_stages = 4;\n"
8434 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8435 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8437 #if RISCV64_Pipeline2
8438 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8439 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {8}, {6, 7}};\n"
8440 "etiss_uint32 num_stages = 4;\n"
8441 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8442 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8445 "etiss_uint64 res = 0;\n"
8449 "res = ((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] * (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
8450 #if RISCV64_DEBUG_CALL
8451 "printf(\"res = %#lx\\n\",res); \n"
8453 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)res;\n"
8454 #if RISCV64_DEBUG_CALL
8455 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8493 partInit.
code() = std::string(
"//mulw\n")+
8494 "etiss_uint32 temp = 0;\n"
8495 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8496 #if RISCV64_Pipeline1
8497 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8498 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8499 "etiss_uint32 num_stages = 4;\n"
8500 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8501 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8503 #if RISCV64_Pipeline2
8504 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8505 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8506 "etiss_uint32 num_stages = 4;\n"
8507 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8508 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8514 "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) * (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff)); \n"
8515 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8517 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8519 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
8520 #if RISCV64_DEBUG_CALL
8521 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8559 partInit.
code() = std::string(
"//mulh\n")+
8560 "etiss_uint32 temp = 0;\n"
8561 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8562 #if RISCV64_Pipeline1
8563 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8564 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8565 "etiss_uint32 num_stages = 4;\n"
8566 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8567 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8569 #if RISCV64_Pipeline2
8570 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8571 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8572 "etiss_uint32 num_stages = 4;\n"
8573 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8574 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8577 "etiss_int64 res = 0;\n"
8581 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
8582 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8584 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8586 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
8587 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
8589 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
8591 "res = ((etiss_int64)cast_1 * (etiss_int64)cast_0);\n"
8592 #if RISCV64_DEBUG_CALL
8593 "printf(\"res = %#lx\\n\",res); \n"
8595 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)(res >> 64);\n"
8596 #if RISCV64_DEBUG_CALL
8597 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8635 partInit.
code() = std::string(
"//mulhsu\n")+
8636 "etiss_uint32 temp = 0;\n"
8637 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8638 #if RISCV64_Pipeline1
8639 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8640 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8641 "etiss_uint32 num_stages = 4;\n"
8642 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8643 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8645 #if RISCV64_Pipeline2
8646 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8647 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8648 "etiss_uint32 num_stages = 4;\n"
8649 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8650 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8653 "etiss_uint64 res = 0;\n"
8657 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
8658 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8660 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8662 "res = ((etiss_int64)cast_0 * (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
8663 #if RISCV64_DEBUG_CALL
8664 "printf(\"res = %#lx\\n\",res); \n"
8666 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)(res >> 64);\n"
8667 #if RISCV64_DEBUG_CALL
8668 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8706 partInit.
code() = std::string(
"//mulhu\n")+
8707 "etiss_uint32 temp = 0;\n"
8708 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8709 #if RISCV64_Pipeline1
8710 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8711 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8712 "etiss_uint32 num_stages = 4;\n"
8713 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8714 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8716 #if RISCV64_Pipeline2
8717 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8718 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8719 "etiss_uint32 num_stages = 4;\n"
8720 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8721 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8724 "etiss_uint64 res = 0;\n"
8728 "res = ((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] * (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
8729 #if RISCV64_DEBUG_CALL
8730 "printf(\"res = %#lx\\n\",res); \n"
8732 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)(res >> 64);\n"
8733 #if RISCV64_DEBUG_CALL
8734 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8772 partInit.
code() = std::string(
"//div\n")+
8773 "etiss_uint32 temp = 0;\n"
8774 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8775 #if RISCV64_Pipeline1
8776 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8777 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8778 "etiss_uint32 num_stages = 4;\n"
8779 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8780 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8782 #if RISCV64_Pipeline2
8783 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8784 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8785 "etiss_uint32 num_stages = 4;\n"
8786 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8787 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8790 "etiss_int8 XLM1 = 0;\n"
8791 "etiss_int64 MMIN = 0;\n"
8792 "etiss_int64 M1 = 0;\n"
8793 "etiss_int64 ONE = 0;\n"
8797 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
8800 #if RISCV64_DEBUG_CALL
8801 "printf(\"M1 = %#lx\\n\",M1); \n"
8804 #if RISCV64_DEBUG_CALL
8805 "printf(\"XLM1 = %#x\\n\",XLM1); \n"
8808 #if RISCV64_DEBUG_CALL
8809 "printf(\"ONE = %#lx\\n\",ONE); \n"
8811 "MMIN = (ONE << XLM1);\n"
8812 #if RISCV64_DEBUG_CALL
8813 "printf(\"MMIN = %#lx\\n\",MMIN); \n"
8815 "if((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] == MMIN) && (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] == M1))\n"
8817 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = MMIN;\n"
8818 #if RISCV64_DEBUG_CALL
8819 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8825 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
8826 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8828 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8830 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
8831 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
8833 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
8835 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_1 / (etiss_int64)cast_0);\n"
8836 #if RISCV64_DEBUG_CALL
8837 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8844 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
8845 #if RISCV64_DEBUG_CALL
8846 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8885 partInit.
code() = std::string(
"//divw\n")+
8886 "etiss_uint32 temp = 0;\n"
8887 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
8888 #if RISCV64_Pipeline1
8889 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8890 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8891 "etiss_uint32 num_stages = 4;\n"
8892 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8893 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8895 #if RISCV64_Pipeline2
8896 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
8897 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
8898 "etiss_uint32 num_stages = 4;\n"
8899 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
8900 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
8903 "etiss_int32 MMIN = 0;\n"
8904 "etiss_int32 M1 = 0;\n"
8905 "etiss_int32 ONE = 0;\n"
8909 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
8912 #if RISCV64_DEBUG_CALL
8913 "printf(\"M1 = %#x\\n\",M1); \n"
8916 #if RISCV64_DEBUG_CALL
8917 "printf(\"ONE = %#x\\n\",ONE); \n"
8919 "MMIN = (ONE << 31);\n"
8920 #if RISCV64_DEBUG_CALL
8921 "printf(\"MMIN = %#x\\n\",MMIN); \n"
8923 "if(((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) == MMIN) && ((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) == M1))\n"
8925 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ( - 1 << 31);\n"
8926 #if RISCV64_DEBUG_CALL
8927 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8933 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff); \n"
8934 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
8936 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
8938 "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
8939 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
8941 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
8943 "etiss_int64 cast_2 = ((etiss_int64)cast_1 / (etiss_int64)cast_0); \n"
8944 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
8946 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
8948 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_2;\n"
8949 #if RISCV64_DEBUG_CALL
8950 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8957 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
8958 #if RISCV64_DEBUG_CALL
8959 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
8998 partInit.
code() = std::string(
"//divu\n")+
8999 "etiss_uint32 temp = 0;\n"
9000 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9001 #if RISCV64_Pipeline1
9002 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9003 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9004 "etiss_uint32 num_stages = 4;\n"
9005 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9006 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9008 #if RISCV64_Pipeline2
9009 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9010 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9011 "etiss_uint32 num_stages = 4;\n"
9012 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9013 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9019 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9021 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] / *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
9022 #if RISCV64_DEBUG_CALL
9023 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9029 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
9030 #if RISCV64_DEBUG_CALL
9031 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9070 partInit.
code() = std::string(
"//divuw\n")+
9071 "etiss_uint32 temp = 0;\n"
9072 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9073 #if RISCV64_Pipeline1
9074 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9075 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9076 "etiss_uint32 num_stages = 4;\n"
9077 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9078 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9080 #if RISCV64_Pipeline2
9081 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9082 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9083 "etiss_uint32 num_stages = 4;\n"
9084 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9085 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9091 "if((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) != 0)\n"
9093 "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) / (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff)); \n"
9094 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9096 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9098 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9099 #if RISCV64_DEBUG_CALL
9100 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9106 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = - 1;\n"
9107 #if RISCV64_DEBUG_CALL
9108 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9147 partInit.
code() = std::string(
"//rem\n")+
9148 "etiss_uint32 temp = 0;\n"
9149 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9150 #if RISCV64_Pipeline1
9151 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9152 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9153 "etiss_uint32 num_stages = 4;\n"
9154 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9155 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9157 #if RISCV64_Pipeline2
9158 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9159 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9160 "etiss_uint32 num_stages = 4;\n"
9161 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9162 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9165 "etiss_int32 XLM1 = 0;\n"
9166 "etiss_int64 MMIN = 0;\n"
9167 "etiss_int64 M1 = 0;\n"
9168 "etiss_int64 ONE = 0;\n"
9172 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9175 #if RISCV64_DEBUG_CALL
9176 "printf(\"M1 = %#lx\\n\",M1); \n"
9179 #if RISCV64_DEBUG_CALL
9180 "printf(\"XLM1 = %#x\\n\",XLM1); \n"
9183 #if RISCV64_DEBUG_CALL
9184 "printf(\"ONE = %#lx\\n\",ONE); \n"
9186 "MMIN = (ONE << XLM1);\n"
9187 #if RISCV64_DEBUG_CALL
9188 "printf(\"MMIN = %#lx\\n\",MMIN); \n"
9190 "if((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] == MMIN) && (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] == M1))\n"
9192 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9193 #if RISCV64_DEBUG_CALL
9194 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9200 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
9201 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9203 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9205 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
9206 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
9208 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
9210 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = ((etiss_int64)cast_1 % (etiss_int64)cast_0);\n"
9211 #if RISCV64_DEBUG_CALL
9212 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9219 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9220 #if RISCV64_DEBUG_CALL
9221 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9260 partInit.
code() = std::string(
"//remw\n")+
9261 "etiss_uint32 temp = 0;\n"
9262 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9263 #if RISCV64_Pipeline1
9264 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9265 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9266 "etiss_uint32 num_stages = 4;\n"
9267 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9268 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9270 #if RISCV64_Pipeline2
9271 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9272 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9273 "etiss_uint32 num_stages = 4;\n"
9274 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9275 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9278 "etiss_int32 MMIN = 0;\n"
9279 "etiss_int32 M1 = 0;\n"
9280 "etiss_int32 ONE = 0;\n"
9284 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9287 #if RISCV64_DEBUG_CALL
9288 "printf(\"M1 = %#x\\n\",M1); \n"
9291 #if RISCV64_DEBUG_CALL
9292 "printf(\"ONE = %#x\\n\",ONE); \n"
9294 "MMIN = (ONE << 31);\n"
9295 #if RISCV64_DEBUG_CALL
9296 "printf(\"MMIN = %#x\\n\",MMIN); \n"
9298 "if(((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) == MMIN) && (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] == M1))\n"
9300 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9301 #if RISCV64_DEBUG_CALL
9302 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9308 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff); \n"
9309 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9311 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9313 "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
9314 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
9316 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
9318 "etiss_int64 cast_2 = ((etiss_int64)cast_1 % (etiss_int64)cast_0); \n"
9319 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
9321 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
9323 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_2;\n"
9324 #if RISCV64_DEBUG_CALL
9325 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9332 "etiss_int64 cast_3 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
9333 "if((etiss_int64)((etiss_uint64)cast_3 - 0x8000000000000000) > 0x0)\n"
9335 "cast_3 =0x0 + (etiss_uint64)cast_3 ;\n"
9337 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_3;\n"
9338 #if RISCV64_DEBUG_CALL
9339 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9378 partInit.
code() = std::string(
"//remu\n")+
9379 "etiss_uint32 temp = 0;\n"
9380 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9381 #if RISCV64_Pipeline1
9382 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9383 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9384 "etiss_uint32 num_stages = 4;\n"
9385 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9386 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9388 #if RISCV64_Pipeline2
9389 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9390 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9391 "etiss_uint32 num_stages = 4;\n"
9392 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9393 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9399 "if(*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] != 0)\n"
9401 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] % *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
9402 #if RISCV64_DEBUG_CALL
9403 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9409 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9410 #if RISCV64_DEBUG_CALL
9411 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9450 partInit.
code() = std::string(
"//remuw\n")+
9451 "etiss_uint32 temp = 0;\n"
9452 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9453 #if RISCV64_Pipeline1
9454 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9455 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9456 "etiss_uint32 num_stages = 4;\n"
9457 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9458 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9460 #if RISCV64_Pipeline2
9461 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9462 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9463 "etiss_uint32 num_stages = 4;\n"
9464 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9465 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9471 "if((*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff) != 0)\n"
9473 "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff) % (*((RISCV64*)cpu)->X[" +
toString(rs2) +
"] & 0xffffffff)); \n"
9474 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9476 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9478 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9479 #if RISCV64_DEBUG_CALL
9480 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9486 "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
9487 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
9489 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
9491 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
9492 #if RISCV64_DEBUG_CALL
9493 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9534 partInit.
code() = std::string(
"//fadd.d\n")+
9535 "etiss_uint32 temp = 0;\n"
9536 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9537 #if RISCV64_Pipeline1
9538 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9539 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9540 "etiss_uint32 num_stages = 4;\n"
9541 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9542 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9544 #if RISCV64_Pipeline2
9545 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9546 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9547 "etiss_uint32 num_stages = 4;\n"
9548 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9549 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9552 "etiss_uint64 res = 0;\n"
9553 "etiss_int64 upper = 0;\n"
9554 "etiss_uint32 flags = 0;\n"
9555 "etiss_uint32 choose1 = 0;\n"
9559 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
9560 #if RISCV64_DEBUG_CALL
9561 "printf(\"choose1 = %#x\\n\",choose1); \n"
9567 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
9568 #if RISCV64_DEBUG_CALL
9569 "printf(\"choose1 = %#x\\n\",choose1); \n"
9572 "res = fadd_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
9573 #if RISCV64_DEBUG_CALL
9574 "printf(\"res = %#lx\\n\",res); \n"
9578 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
9579 #if RISCV64_DEBUG_CALL
9580 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
9587 #if RISCV64_DEBUG_CALL
9588 "printf(\"upper = %#lx\\n\",upper); \n"
9590 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
9591 #if RISCV64_DEBUG_CALL
9592 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
9595 "flags = fget_flags();\n"
9596 #if RISCV64_DEBUG_CALL
9597 "printf(\"flags = %#x\\n\",flags); \n"
9599 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
9600 #if RISCV64_DEBUG_CALL
9601 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
9640 partInit.
code() = std::string(
"//lr.w\n")+
9641 "etiss_uint32 exception = 0;\n"
9642 "etiss_uint32 temp = 0;\n"
9643 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9644 #if RISCV64_Pipeline1
9645 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9646 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9647 "etiss_uint32 num_stages = 4;\n"
9648 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9649 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9651 #if RISCV64_Pipeline2
9652 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9653 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9654 "etiss_uint32 num_stages = 4;\n"
9655 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9656 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9659 "etiss_uint64 offs = 0;\n"
9663 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9664 #if RISCV64_DEBUG_CALL
9665 "printf(\"offs = %#lx\\n\",offs); \n"
9667 "etiss_uint32 MEM_offs;\n"
9668 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9669 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
9670 "etiss_int32 cast_0 = MEM_offs; \n"
9671 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
9673 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
9675 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9676 #if RISCV64_DEBUG_CALL
9677 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9679 "((RISCV64*)cpu)->RES = offs;\n"
9680 #if RISCV64_DEBUG_CALL
9681 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9688 "return exception;\n"
9723 partInit.
code() = std::string(
"//lr.d\n")+
9724 "etiss_uint32 exception = 0;\n"
9725 "etiss_uint32 temp = 0;\n"
9726 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9727 #if RISCV64_Pipeline1
9728 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9729 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9730 "etiss_uint32 num_stages = 4;\n"
9731 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9732 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9734 #if RISCV64_Pipeline2
9735 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9736 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9737 "etiss_uint32 num_stages = 4;\n"
9738 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9739 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9742 "etiss_uint64 offs = 0;\n"
9746 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9747 #if RISCV64_DEBUG_CALL
9748 "printf(\"offs = %#lx\\n\",offs); \n"
9750 "etiss_uint64 MEM_offs;\n"
9751 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9752 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
9753 "etiss_int64 cast_0 = MEM_offs; \n"
9754 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
9756 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
9758 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
9759 #if RISCV64_DEBUG_CALL
9760 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9762 "((RISCV64*)cpu)->RES = offs;\n"
9763 #if RISCV64_DEBUG_CALL
9764 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9771 "return exception;\n"
9811 partInit.
code() = std::string(
"//sc.w\n")+
9812 "etiss_uint32 exception = 0;\n"
9813 "etiss_uint32 temp = 0;\n"
9814 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9815 #if RISCV64_Pipeline1
9816 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9817 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9818 "etiss_uint32 num_stages = 4;\n"
9819 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9820 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9822 #if RISCV64_Pipeline2
9823 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9824 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9825 "etiss_uint32 num_stages = 4;\n"
9826 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9827 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9830 "etiss_uint64 offs = 0;\n"
9832 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9833 #if RISCV64_DEBUG_CALL
9834 "printf(\"offs = %#lx\\n\",offs); \n"
9836 "if(offs == ((RISCV64*)cpu)->RES)\n"
9838 "etiss_uint32 MEM_offs;\n"
9839 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9840 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
9841 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
9842 #if RISCV64_DEBUG_CALL
9843 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
9847 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9848 #if RISCV64_DEBUG_CALL
9849 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9853 "((RISCV64*)cpu)->RES = 0;\n"
9854 #if RISCV64_DEBUG_CALL
9855 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9863 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 1;\n"
9864 #if RISCV64_DEBUG_CALL
9865 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9869 "((RISCV64*)cpu)->RES = 0;\n"
9870 #if RISCV64_DEBUG_CALL
9871 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9877 "return exception;\n"
9917 partInit.
code() = std::string(
"//sc.d\n")+
9918 "etiss_uint32 exception = 0;\n"
9919 "etiss_uint32 temp = 0;\n"
9920 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
9921 #if RISCV64_Pipeline1
9922 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9923 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9924 "etiss_uint32 num_stages = 4;\n"
9925 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9926 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9928 #if RISCV64_Pipeline2
9929 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
9930 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
9931 "etiss_uint32 num_stages = 4;\n"
9932 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
9933 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
9936 "etiss_uint64 offs = 0;\n"
9938 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
9939 #if RISCV64_DEBUG_CALL
9940 "printf(\"offs = %#lx\\n\",offs); \n"
9942 "if(offs == ((RISCV64*)cpu)->RES)\n"
9944 "etiss_uint64 MEM_offs;\n"
9945 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
9946 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
9947 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
9948 #if RISCV64_DEBUG_CALL
9949 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
9953 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 0;\n"
9954 #if RISCV64_DEBUG_CALL
9955 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9959 "((RISCV64*)cpu)->RES = 0;\n"
9960 #if RISCV64_DEBUG_CALL
9961 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9969 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = 1;\n"
9970 #if RISCV64_DEBUG_CALL
9971 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
9975 "((RISCV64*)cpu)->RES = 0;\n"
9976 #if RISCV64_DEBUG_CALL
9977 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
9983 "return exception;\n"
10023 partInit.
code() = std::string(
"//amoswap.w\n")+
10024 "etiss_uint32 exception = 0;\n"
10025 "etiss_uint32 temp = 0;\n"
10026 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10027 #if RISCV64_Pipeline1
10028 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10029 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10030 "etiss_uint32 num_stages = 4;\n"
10031 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10032 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10034 #if RISCV64_Pipeline2
10035 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10036 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10037 "etiss_uint32 num_stages = 4;\n"
10038 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10039 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10042 "etiss_uint64 offs = 0;\n"
10044 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10045 #if RISCV64_DEBUG_CALL
10046 "printf(\"offs = %#lx\\n\",offs); \n"
10050 "etiss_uint32 MEM_offs;\n"
10051 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10052 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10053 "etiss_int32 cast_0 = MEM_offs; \n"
10054 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10056 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10058 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
10059 #if RISCV64_DEBUG_CALL
10060 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10064 "etiss_uint32 MEM_offs;\n"
10065 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10066 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10067 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10068 #if RISCV64_DEBUG_CALL
10069 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10071 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10073 "((RISCV64*)cpu)->RES = 0;\n"
10074 #if RISCV64_DEBUG_CALL
10075 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10082 "return exception;\n"
10122 partInit.
code() = std::string(
"//amoswap.d\n")+
10123 "etiss_uint32 exception = 0;\n"
10124 "etiss_uint32 temp = 0;\n"
10125 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10126 #if RISCV64_Pipeline1
10127 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10128 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10129 "etiss_uint32 num_stages = 4;\n"
10130 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10131 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10133 #if RISCV64_Pipeline2
10134 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10135 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10136 "etiss_uint32 num_stages = 4;\n"
10137 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10138 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10141 "etiss_uint64 offs = 0;\n"
10143 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10144 #if RISCV64_DEBUG_CALL
10145 "printf(\"offs = %#lx\\n\",offs); \n"
10149 "etiss_uint64 MEM_offs;\n"
10150 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10151 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10152 "etiss_int64 cast_0 = MEM_offs; \n"
10153 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10155 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10157 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
10158 #if RISCV64_DEBUG_CALL
10159 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10163 "etiss_uint64 MEM_offs;\n"
10164 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10165 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10166 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10167 #if RISCV64_DEBUG_CALL
10168 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10170 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10172 "((RISCV64*)cpu)->RES = 0;\n"
10173 #if RISCV64_DEBUG_CALL
10174 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10181 "return exception;\n"
10221 partInit.
code() = std::string(
"//amoadd.w\n")+
10222 "etiss_uint32 exception = 0;\n"
10223 "etiss_uint32 temp = 0;\n"
10224 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10225 #if RISCV64_Pipeline1
10226 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10227 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10228 "etiss_uint32 num_stages = 4;\n"
10229 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10230 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10232 #if RISCV64_Pipeline2
10233 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10234 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10235 "etiss_uint32 num_stages = 4;\n"
10236 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10237 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10240 "etiss_uint64 offs = 0;\n"
10241 "etiss_int64 res1 = 0;\n"
10242 "etiss_uint64 res2 = 0;\n"
10244 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10245 #if RISCV64_DEBUG_CALL
10246 "printf(\"offs = %#lx\\n\",offs); \n"
10248 "etiss_uint32 MEM_offs;\n"
10249 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10250 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10251 "etiss_int32 cast_0 = MEM_offs; \n"
10252 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10254 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10256 "res1 = (etiss_int64)cast_0;\n"
10257 #if RISCV64_DEBUG_CALL
10258 "printf(\"res1 = %#lx\\n\",res1); \n"
10262 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10263 #if RISCV64_DEBUG_CALL
10264 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10268 "res2 = res1 + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10269 #if RISCV64_DEBUG_CALL
10270 "printf(\"res2 = %#lx\\n\",res2); \n"
10272 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10273 "MEM_offs = res2;\n"
10274 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10275 #if RISCV64_DEBUG_CALL
10276 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10278 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10280 "((RISCV64*)cpu)->RES = 0;\n"
10281 #if RISCV64_DEBUG_CALL
10282 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10289 "return exception;\n"
10329 partInit.
code() = std::string(
"//amoadd.d\n")+
10330 "etiss_uint32 exception = 0;\n"
10331 "etiss_uint32 temp = 0;\n"
10332 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10333 #if RISCV64_Pipeline1
10334 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10335 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10336 "etiss_uint32 num_stages = 4;\n"
10337 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10338 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10340 #if RISCV64_Pipeline2
10341 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10342 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10343 "etiss_uint32 num_stages = 4;\n"
10344 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10345 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10348 "etiss_uint64 offs = 0;\n"
10349 "etiss_int64 res = 0;\n"
10350 "etiss_uint64 res2 = 0;\n"
10352 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10353 #if RISCV64_DEBUG_CALL
10354 "printf(\"offs = %#lx\\n\",offs); \n"
10356 "etiss_uint64 MEM_offs;\n"
10357 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10358 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10359 "etiss_int64 cast_0 = MEM_offs; \n"
10360 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10362 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10364 "res = (etiss_int64)cast_0;\n"
10365 #if RISCV64_DEBUG_CALL
10366 "printf(\"res = %#lx\\n\",res); \n"
10370 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
10371 #if RISCV64_DEBUG_CALL
10372 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10376 "res2 = res + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
10377 #if RISCV64_DEBUG_CALL
10378 "printf(\"res2 = %#lx\\n\",res2); \n"
10380 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10381 "MEM_offs = res2;\n"
10382 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10383 #if RISCV64_DEBUG_CALL
10384 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10386 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10388 "((RISCV64*)cpu)->RES = 0;\n"
10389 #if RISCV64_DEBUG_CALL
10390 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10397 "return exception;\n"
10437 partInit.
code() = std::string(
"//amoxor.w\n")+
10438 "etiss_uint32 exception = 0;\n"
10439 "etiss_uint32 temp = 0;\n"
10440 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10441 #if RISCV64_Pipeline1
10442 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10443 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10444 "etiss_uint32 num_stages = 4;\n"
10445 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10446 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10448 #if RISCV64_Pipeline2
10449 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10450 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10451 "etiss_uint32 num_stages = 4;\n"
10452 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10453 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10456 "etiss_uint64 offs = 0;\n"
10457 "etiss_int64 res1 = 0;\n"
10458 "etiss_uint64 res2 = 0;\n"
10460 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10461 #if RISCV64_DEBUG_CALL
10462 "printf(\"offs = %#lx\\n\",offs); \n"
10464 "etiss_uint32 MEM_offs;\n"
10465 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10466 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10467 "etiss_int32 cast_0 = MEM_offs; \n"
10468 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10470 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10472 "res1 = (etiss_int64)cast_0;\n"
10473 #if RISCV64_DEBUG_CALL
10474 "printf(\"res1 = %#lx\\n\",res1); \n"
10478 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10479 #if RISCV64_DEBUG_CALL
10480 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10484 "res2 = (res1 ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10485 #if RISCV64_DEBUG_CALL
10486 "printf(\"res2 = %#lx\\n\",res2); \n"
10488 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10489 "MEM_offs = res2;\n"
10490 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10491 #if RISCV64_DEBUG_CALL
10492 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10494 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10496 "((RISCV64*)cpu)->RES = 0;\n"
10497 #if RISCV64_DEBUG_CALL
10498 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10505 "return exception;\n"
10545 partInit.
code() = std::string(
"//amoxor.d\n")+
10546 "etiss_uint32 exception = 0;\n"
10547 "etiss_uint32 temp = 0;\n"
10548 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10549 #if RISCV64_Pipeline1
10550 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10551 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10552 "etiss_uint32 num_stages = 4;\n"
10553 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10554 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10556 #if RISCV64_Pipeline2
10557 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10558 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10559 "etiss_uint32 num_stages = 4;\n"
10560 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10561 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10564 "etiss_uint64 offs = 0;\n"
10565 "etiss_int64 res = 0;\n"
10566 "etiss_uint64 res2 = 0;\n"
10568 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10569 #if RISCV64_DEBUG_CALL
10570 "printf(\"offs = %#lx\\n\",offs); \n"
10572 "etiss_uint64 MEM_offs;\n"
10573 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10574 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10575 "etiss_int64 cast_0 = MEM_offs; \n"
10576 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10578 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10580 "res = (etiss_int64)cast_0;\n"
10581 #if RISCV64_DEBUG_CALL
10582 "printf(\"res = %#lx\\n\",res); \n"
10586 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
10587 #if RISCV64_DEBUG_CALL
10588 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10592 "res2 = (res ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10593 #if RISCV64_DEBUG_CALL
10594 "printf(\"res2 = %#lx\\n\",res2); \n"
10596 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10597 "MEM_offs = res2;\n"
10598 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10599 #if RISCV64_DEBUG_CALL
10600 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10602 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10604 "((RISCV64*)cpu)->RES = 0;\n"
10605 #if RISCV64_DEBUG_CALL
10606 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10613 "return exception;\n"
10653 partInit.
code() = std::string(
"//amoand.w\n")+
10654 "etiss_uint32 exception = 0;\n"
10655 "etiss_uint32 temp = 0;\n"
10656 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10657 #if RISCV64_Pipeline1
10658 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10659 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10660 "etiss_uint32 num_stages = 4;\n"
10661 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10662 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10664 #if RISCV64_Pipeline2
10665 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10666 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10667 "etiss_uint32 num_stages = 4;\n"
10668 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10669 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10672 "etiss_uint64 offs = 0;\n"
10673 "etiss_int64 res1 = 0;\n"
10674 "etiss_uint64 res2 = 0;\n"
10676 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10677 #if RISCV64_DEBUG_CALL
10678 "printf(\"offs = %#lx\\n\",offs); \n"
10680 "etiss_uint32 MEM_offs;\n"
10681 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10682 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10683 "etiss_int32 cast_0 = MEM_offs; \n"
10684 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10686 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10688 "res1 = (etiss_int64)cast_0;\n"
10689 #if RISCV64_DEBUG_CALL
10690 "printf(\"res1 = %#lx\\n\",res1); \n"
10694 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10695 #if RISCV64_DEBUG_CALL
10696 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10700 "res2 = (res1 & *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10701 #if RISCV64_DEBUG_CALL
10702 "printf(\"res2 = %#lx\\n\",res2); \n"
10704 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10705 "MEM_offs = res2;\n"
10706 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10707 #if RISCV64_DEBUG_CALL
10708 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10710 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10712 "((RISCV64*)cpu)->RES = 0;\n"
10713 #if RISCV64_DEBUG_CALL
10714 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10721 "return exception;\n"
10761 partInit.
code() = std::string(
"//amoand.d\n")+
10762 "etiss_uint32 exception = 0;\n"
10763 "etiss_uint32 temp = 0;\n"
10764 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10765 #if RISCV64_Pipeline1
10766 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10767 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10768 "etiss_uint32 num_stages = 4;\n"
10769 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10770 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10772 #if RISCV64_Pipeline2
10773 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10774 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10775 "etiss_uint32 num_stages = 4;\n"
10776 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10777 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10780 "etiss_uint64 offs = 0;\n"
10781 "etiss_int64 res = 0;\n"
10782 "etiss_uint64 res2 = 0;\n"
10784 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10785 #if RISCV64_DEBUG_CALL
10786 "printf(\"offs = %#lx\\n\",offs); \n"
10788 "etiss_uint64 MEM_offs;\n"
10789 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10790 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
10791 "etiss_int64 cast_0 = MEM_offs; \n"
10792 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
10794 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
10796 "res = (etiss_int64)cast_0;\n"
10797 #if RISCV64_DEBUG_CALL
10798 "printf(\"res = %#lx\\n\",res); \n"
10802 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
10803 #if RISCV64_DEBUG_CALL
10804 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10808 "res2 = (res & *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10809 #if RISCV64_DEBUG_CALL
10810 "printf(\"res2 = %#lx\\n\",res2); \n"
10812 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10813 "MEM_offs = res2;\n"
10814 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
10815 #if RISCV64_DEBUG_CALL
10816 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10818 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10820 "((RISCV64*)cpu)->RES = 0;\n"
10821 #if RISCV64_DEBUG_CALL
10822 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10829 "return exception;\n"
10869 partInit.
code() = std::string(
"//amoor.w\n")+
10870 "etiss_uint32 exception = 0;\n"
10871 "etiss_uint32 temp = 0;\n"
10872 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10873 #if RISCV64_Pipeline1
10874 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10875 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10876 "etiss_uint32 num_stages = 4;\n"
10877 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10878 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10880 #if RISCV64_Pipeline2
10881 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10882 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10883 "etiss_uint32 num_stages = 4;\n"
10884 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10885 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10888 "etiss_uint64 offs = 0;\n"
10889 "etiss_int64 res1 = 0;\n"
10890 "etiss_uint64 res2 = 0;\n"
10892 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
10893 #if RISCV64_DEBUG_CALL
10894 "printf(\"offs = %#lx\\n\",offs); \n"
10896 "etiss_uint32 MEM_offs;\n"
10897 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10898 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
10899 "etiss_int32 cast_0 = MEM_offs; \n"
10900 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
10902 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
10904 "res1 = (etiss_int64)cast_0;\n"
10905 #if RISCV64_DEBUG_CALL
10906 "printf(\"res1 = %#lx\\n\",res1); \n"
10910 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
10911 #if RISCV64_DEBUG_CALL
10912 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
10916 "res2 = (res1 | *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
10917 #if RISCV64_DEBUG_CALL
10918 "printf(\"res2 = %#lx\\n\",res2); \n"
10920 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
10921 "MEM_offs = res2;\n"
10922 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
10923 #if RISCV64_DEBUG_CALL
10924 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
10926 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
10928 "((RISCV64*)cpu)->RES = 0;\n"
10929 #if RISCV64_DEBUG_CALL
10930 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
10937 "return exception;\n"
10977 partInit.
code() = std::string(
"//amoor.d\n")+
10978 "etiss_uint32 exception = 0;\n"
10979 "etiss_uint32 temp = 0;\n"
10980 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
10981 #if RISCV64_Pipeline1
10982 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10983 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10984 "etiss_uint32 num_stages = 4;\n"
10985 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10986 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10988 #if RISCV64_Pipeline2
10989 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
10990 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
10991 "etiss_uint32 num_stages = 4;\n"
10992 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
10993 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
10996 "etiss_uint64 offs = 0;\n"
10997 "etiss_int64 res = 0;\n"
10998 "etiss_uint64 res2 = 0;\n"
11000 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11001 #if RISCV64_DEBUG_CALL
11002 "printf(\"offs = %#lx\\n\",offs); \n"
11004 "etiss_uint64 MEM_offs;\n"
11005 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11006 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11007 "etiss_int64 cast_0 = MEM_offs; \n"
11008 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11010 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11012 "res = (etiss_int64)cast_0;\n"
11013 #if RISCV64_DEBUG_CALL
11014 "printf(\"res = %#lx\\n\",res); \n"
11018 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
11019 #if RISCV64_DEBUG_CALL
11020 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11024 "res2 = (res | *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]);\n"
11025 #if RISCV64_DEBUG_CALL
11026 "printf(\"res2 = %#lx\\n\",res2); \n"
11028 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11029 "MEM_offs = res2;\n"
11030 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11031 #if RISCV64_DEBUG_CALL
11032 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11034 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11036 "((RISCV64*)cpu)->RES = 0;\n"
11037 #if RISCV64_DEBUG_CALL
11038 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11045 "return exception;\n"
11085 partInit.
code() = std::string(
"//amomin.w\n")+
11086 "etiss_uint32 exception = 0;\n"
11087 "etiss_uint32 temp = 0;\n"
11088 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11089 #if RISCV64_Pipeline1
11090 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11091 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11092 "etiss_uint32 num_stages = 4;\n"
11093 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11094 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11096 #if RISCV64_Pipeline2
11097 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11098 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11099 "etiss_uint32 num_stages = 4;\n"
11100 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11101 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11104 "etiss_uint64 offs = 0;\n"
11105 "etiss_int64 res1 = 0;\n"
11106 "etiss_uint64 res2 = 0;\n"
11107 "etiss_uint64 choose1 = 0;\n"
11109 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11110 #if RISCV64_DEBUG_CALL
11111 "printf(\"offs = %#lx\\n\",offs); \n"
11113 "etiss_uint32 MEM_offs;\n"
11114 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11115 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11116 "etiss_int32 cast_0 = MEM_offs; \n"
11117 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11119 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11121 "res1 = (etiss_int64)cast_0;\n"
11122 #if RISCV64_DEBUG_CALL
11123 "printf(\"res1 = %#lx\\n\",res1); \n"
11127 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11128 #if RISCV64_DEBUG_CALL
11129 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11133 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11134 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11136 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11138 "etiss_int64 cast_2 = res1; \n"
11139 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11141 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11143 "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n"
11145 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11146 #if RISCV64_DEBUG_CALL
11147 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11153 "choose1 = res1;\n"
11154 #if RISCV64_DEBUG_CALL
11155 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11158 "res2 = choose1;\n"
11159 #if RISCV64_DEBUG_CALL
11160 "printf(\"res2 = %#lx\\n\",res2); \n"
11162 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11163 "MEM_offs = res2;\n"
11164 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11165 #if RISCV64_DEBUG_CALL
11166 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11168 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11170 "((RISCV64*)cpu)->RES = 0;\n"
11171 #if RISCV64_DEBUG_CALL
11172 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11179 "return exception;\n"
11219 partInit.
code() = std::string(
"//amomin.d\n")+
11220 "etiss_uint32 exception = 0;\n"
11221 "etiss_uint32 temp = 0;\n"
11222 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11223 #if RISCV64_Pipeline1
11224 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11225 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11226 "etiss_uint32 num_stages = 4;\n"
11227 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11228 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11230 #if RISCV64_Pipeline2
11231 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11232 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11233 "etiss_uint32 num_stages = 4;\n"
11234 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11235 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11238 "etiss_uint64 offs = 0;\n"
11239 "etiss_int64 res1 = 0;\n"
11240 "etiss_uint64 res2 = 0;\n"
11241 "etiss_uint64 choose1 = 0;\n"
11243 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11244 #if RISCV64_DEBUG_CALL
11245 "printf(\"offs = %#lx\\n\",offs); \n"
11247 "etiss_uint64 MEM_offs;\n"
11248 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11249 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11250 "etiss_int64 cast_0 = MEM_offs; \n"
11251 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11253 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11255 "res1 = (etiss_int64)cast_0;\n"
11256 #if RISCV64_DEBUG_CALL
11257 "printf(\"res1 = %#lx\\n\",res1); \n"
11261 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11262 #if RISCV64_DEBUG_CALL
11263 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11267 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11268 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11270 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11272 "etiss_int64 cast_2 = res1; \n"
11273 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11275 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11277 "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n"
11279 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11280 #if RISCV64_DEBUG_CALL
11281 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11287 "choose1 = res1;\n"
11288 #if RISCV64_DEBUG_CALL
11289 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11292 "res2 = choose1;\n"
11293 #if RISCV64_DEBUG_CALL
11294 "printf(\"res2 = %#lx\\n\",res2); \n"
11296 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11297 "MEM_offs = res2;\n"
11298 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11299 #if RISCV64_DEBUG_CALL
11300 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11302 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11304 "((RISCV64*)cpu)->RES = 0;\n"
11305 #if RISCV64_DEBUG_CALL
11306 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11313 "return exception;\n"
11353 partInit.
code() = std::string(
"//amomax.w\n")+
11354 "etiss_uint32 exception = 0;\n"
11355 "etiss_uint32 temp = 0;\n"
11356 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11357 #if RISCV64_Pipeline1
11358 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11359 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11360 "etiss_uint32 num_stages = 4;\n"
11361 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11362 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11364 #if RISCV64_Pipeline2
11365 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11366 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11367 "etiss_uint32 num_stages = 4;\n"
11368 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11369 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11372 "etiss_uint64 offs = 0;\n"
11373 "etiss_int64 res1 = 0;\n"
11374 "etiss_uint64 res2 = 0;\n"
11375 "etiss_uint64 choose1 = 0;\n"
11377 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11378 #if RISCV64_DEBUG_CALL
11379 "printf(\"offs = %#lx\\n\",offs); \n"
11381 "etiss_uint32 MEM_offs;\n"
11382 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11383 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11384 "etiss_int32 cast_0 = MEM_offs; \n"
11385 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11387 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11389 "res1 = (etiss_int64)cast_0;\n"
11390 #if RISCV64_DEBUG_CALL
11391 "printf(\"res1 = %#lx\\n\",res1); \n"
11395 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11396 #if RISCV64_DEBUG_CALL
11397 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11401 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11402 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11404 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11406 "etiss_int64 cast_2 = res1; \n"
11407 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11409 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11411 "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n"
11413 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11414 #if RISCV64_DEBUG_CALL
11415 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11421 "choose1 = res1;\n"
11422 #if RISCV64_DEBUG_CALL
11423 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11426 "res2 = choose1;\n"
11427 #if RISCV64_DEBUG_CALL
11428 "printf(\"res2 = %#lx\\n\",res2); \n"
11430 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11431 "MEM_offs = res2;\n"
11432 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11433 #if RISCV64_DEBUG_CALL
11434 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11436 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11438 "((RISCV64*)cpu)->RES = 0;\n"
11439 #if RISCV64_DEBUG_CALL
11440 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11447 "return exception;\n"
11487 partInit.
code() = std::string(
"//amomax.d\n")+
11488 "etiss_uint32 exception = 0;\n"
11489 "etiss_uint32 temp = 0;\n"
11490 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11491 #if RISCV64_Pipeline1
11492 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11493 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11494 "etiss_uint32 num_stages = 4;\n"
11495 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11496 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11498 #if RISCV64_Pipeline2
11499 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11500 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11501 "etiss_uint32 num_stages = 4;\n"
11502 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11503 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11506 "etiss_uint64 offs = 0;\n"
11507 "etiss_int64 res = 0;\n"
11508 "etiss_uint64 res2 = 0;\n"
11509 "etiss_uint64 choose1 = 0;\n"
11511 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11512 #if RISCV64_DEBUG_CALL
11513 "printf(\"offs = %#lx\\n\",offs); \n"
11515 "etiss_uint64 MEM_offs;\n"
11516 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11517 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11518 "etiss_int64 cast_0 = MEM_offs; \n"
11519 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11521 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11523 "res = (etiss_int64)cast_0;\n"
11524 #if RISCV64_DEBUG_CALL
11525 "printf(\"res = %#lx\\n\",res); \n"
11529 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
11530 #if RISCV64_DEBUG_CALL
11531 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11535 "etiss_int64 cast_1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"]; \n"
11536 "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n"
11538 "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n"
11540 "etiss_int64 cast_2 = res; \n"
11541 "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n"
11543 "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n"
11545 "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n"
11547 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11548 #if RISCV64_DEBUG_CALL
11549 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11556 #if RISCV64_DEBUG_CALL
11557 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11560 "res2 = choose1;\n"
11561 #if RISCV64_DEBUG_CALL
11562 "printf(\"res2 = %#lx\\n\",res2); \n"
11564 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11565 "MEM_offs = res2;\n"
11566 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11567 #if RISCV64_DEBUG_CALL
11568 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11570 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11572 "((RISCV64*)cpu)->RES = 0;\n"
11573 #if RISCV64_DEBUG_CALL
11574 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11581 "return exception;\n"
11621 partInit.
code() = std::string(
"//amominu.w\n")+
11622 "etiss_uint32 exception = 0;\n"
11623 "etiss_uint32 temp = 0;\n"
11624 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11625 #if RISCV64_Pipeline1
11626 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11627 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11628 "etiss_uint32 num_stages = 4;\n"
11629 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11630 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11632 #if RISCV64_Pipeline2
11633 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11634 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11635 "etiss_uint32 num_stages = 4;\n"
11636 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11637 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11640 "etiss_uint64 offs = 0;\n"
11641 "etiss_int64 res1 = 0;\n"
11642 "etiss_uint64 res2 = 0;\n"
11643 "etiss_uint64 choose1 = 0;\n"
11645 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11646 #if RISCV64_DEBUG_CALL
11647 "printf(\"offs = %#lx\\n\",offs); \n"
11649 "etiss_uint32 MEM_offs;\n"
11650 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11651 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11652 "etiss_int32 cast_0 = MEM_offs; \n"
11653 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11655 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11657 "res1 = (etiss_int64)cast_0;\n"
11658 #if RISCV64_DEBUG_CALL
11659 "printf(\"res1 = %#lx\\n\",res1); \n"
11663 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11664 #if RISCV64_DEBUG_CALL
11665 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11669 "if(res1 > *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
11671 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11672 #if RISCV64_DEBUG_CALL
11673 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11679 "choose1 = res1;\n"
11680 #if RISCV64_DEBUG_CALL
11681 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11684 "res2 = choose1;\n"
11685 #if RISCV64_DEBUG_CALL
11686 "printf(\"res2 = %#lx\\n\",res2); \n"
11688 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11689 "MEM_offs = res2;\n"
11690 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11691 #if RISCV64_DEBUG_CALL
11692 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11694 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11696 "((RISCV64*)cpu)->RES = 0;\n"
11697 #if RISCV64_DEBUG_CALL
11698 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11705 "return exception;\n"
11745 partInit.
code() = std::string(
"//amominu.d\n")+
11746 "etiss_uint32 exception = 0;\n"
11747 "etiss_uint32 temp = 0;\n"
11748 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11749 #if RISCV64_Pipeline1
11750 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11751 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11752 "etiss_uint32 num_stages = 4;\n"
11753 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11754 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11756 #if RISCV64_Pipeline2
11757 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11758 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11759 "etiss_uint32 num_stages = 4;\n"
11760 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11761 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11764 "etiss_uint64 offs = 0;\n"
11765 "etiss_int64 res = 0;\n"
11766 "etiss_uint64 res2 = 0;\n"
11767 "etiss_uint64 choose1 = 0;\n"
11769 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11770 #if RISCV64_DEBUG_CALL
11771 "printf(\"offs = %#lx\\n\",offs); \n"
11773 "etiss_uint64 MEM_offs;\n"
11774 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11775 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
11776 "etiss_int64 cast_0 = MEM_offs; \n"
11777 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
11779 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
11781 "res = (etiss_int64)cast_0;\n"
11782 #if RISCV64_DEBUG_CALL
11783 "printf(\"res = %#lx\\n\",res); \n"
11787 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res;\n"
11788 #if RISCV64_DEBUG_CALL
11789 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11793 "if(res > *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
11795 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11796 #if RISCV64_DEBUG_CALL
11797 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11804 #if RISCV64_DEBUG_CALL
11805 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11808 "res2 = choose1;\n"
11809 #if RISCV64_DEBUG_CALL
11810 "printf(\"res2 = %#lx\\n\",res2); \n"
11812 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11813 "MEM_offs = res2;\n"
11814 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
11815 #if RISCV64_DEBUG_CALL
11816 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11818 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11820 "((RISCV64*)cpu)->RES = 0;\n"
11821 #if RISCV64_DEBUG_CALL
11822 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11829 "return exception;\n"
11869 partInit.
code() = std::string(
"//amomaxu.w\n")+
11870 "etiss_uint32 exception = 0;\n"
11871 "etiss_uint32 temp = 0;\n"
11872 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11873 #if RISCV64_Pipeline1
11874 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11875 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11876 "etiss_uint32 num_stages = 4;\n"
11877 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11878 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11880 #if RISCV64_Pipeline2
11881 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11882 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
11883 "etiss_uint32 num_stages = 4;\n"
11884 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
11885 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
11888 "etiss_uint64 offs = 0;\n"
11889 "etiss_int64 res1 = 0;\n"
11890 "etiss_uint64 res2 = 0;\n"
11891 "etiss_uint64 choose1 = 0;\n"
11893 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
11894 #if RISCV64_DEBUG_CALL
11895 "printf(\"offs = %#lx\\n\",offs); \n"
11897 "etiss_uint32 MEM_offs;\n"
11898 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11899 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
11900 "etiss_int32 cast_0 = MEM_offs; \n"
11901 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
11903 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
11905 "res1 = (etiss_int64)cast_0;\n"
11906 #if RISCV64_DEBUG_CALL
11907 "printf(\"res1 = %#lx\\n\",res1); \n"
11911 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
11912 #if RISCV64_DEBUG_CALL
11913 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
11917 "if(res1 < *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
11919 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
11920 #if RISCV64_DEBUG_CALL
11921 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11927 "choose1 = res1;\n"
11928 #if RISCV64_DEBUG_CALL
11929 "printf(\"choose1 = %#lx\\n\",choose1); \n"
11932 "res2 = choose1;\n"
11933 #if RISCV64_DEBUG_CALL
11934 "printf(\"res2 = %#lx\\n\",res2); \n"
11936 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
11937 "MEM_offs = res2;\n"
11938 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
11939 #if RISCV64_DEBUG_CALL
11940 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
11942 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
11944 "((RISCV64*)cpu)->RES = 0;\n"
11945 #if RISCV64_DEBUG_CALL
11946 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
11953 "return exception;\n"
11993 partInit.
code() = std::string(
"//amomaxu.d\n")+
11994 "etiss_uint32 exception = 0;\n"
11995 "etiss_uint32 temp = 0;\n"
11996 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
11997 #if RISCV64_Pipeline1
11998 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
11999 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12000 "etiss_uint32 num_stages = 4;\n"
12001 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12002 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12004 #if RISCV64_Pipeline2
12005 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12006 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12007 "etiss_uint32 num_stages = 4;\n"
12008 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12009 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12012 "etiss_uint64 offs = 0;\n"
12013 "etiss_int64 res1 = 0;\n"
12014 "etiss_uint64 res2 = 0;\n"
12015 "etiss_uint64 choose1 = 0;\n"
12017 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
12018 #if RISCV64_DEBUG_CALL
12019 "printf(\"offs = %#lx\\n\",offs); \n"
12021 "etiss_uint64 MEM_offs;\n"
12022 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
12023 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
12024 "etiss_int64 cast_0 = MEM_offs; \n"
12025 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
12027 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
12029 "res1 = (etiss_int64)cast_0;\n"
12030 #if RISCV64_DEBUG_CALL
12031 "printf(\"res1 = %#lx\\n\",res1); \n"
12035 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = res1;\n"
12036 #if RISCV64_DEBUG_CALL
12037 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
12041 "if(res1 < *((RISCV64*)cpu)->X[" +
toString(rs2) +
"])\n"
12043 "choose1 = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
12044 #if RISCV64_DEBUG_CALL
12045 "printf(\"choose1 = %#lx\\n\",choose1); \n"
12051 "choose1 = res1;\n"
12052 #if RISCV64_DEBUG_CALL
12053 "printf(\"choose1 = %#lx\\n\",choose1); \n"
12056 "res2 = choose1;\n"
12057 #if RISCV64_DEBUG_CALL
12058 "printf(\"res2 = %#lx\\n\",res2); \n"
12060 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
12061 "MEM_offs = res2;\n"
12062 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
12063 #if RISCV64_DEBUG_CALL
12064 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
12066 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
12068 "((RISCV64*)cpu)->RES = 0;\n"
12069 #if RISCV64_DEBUG_CALL
12070 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
12077 "return exception;\n"
12111 partInit.
code() = std::string(
"//fsub.s\n")+
12112 "etiss_uint32 temp = 0;\n"
12113 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12114 #if RISCV64_Pipeline1
12115 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12116 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12117 "etiss_uint32 num_stages = 4;\n"
12118 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12119 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12121 #if RISCV64_Pipeline2
12122 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12123 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12124 "etiss_uint32 num_stages = 4;\n"
12125 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12126 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12129 "etiss_uint32 res = 0;\n"
12130 "etiss_int64 upper = 0;\n"
12131 "etiss_uint32 flags = 0;\n"
12132 "etiss_uint32 frs1 = 0;\n"
12133 "etiss_uint32 choose1 = 0;\n"
12134 "etiss_uint32 frs2 = 0;\n"
12140 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12141 #if RISCV64_DEBUG_CALL
12142 "printf(\"choose1 = %#x\\n\",choose1); \n"
12148 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12149 #if RISCV64_DEBUG_CALL
12150 "printf(\"choose1 = %#x\\n\",choose1); \n"
12153 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsub_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
12154 #if RISCV64_DEBUG_CALL
12155 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12161 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12162 #if RISCV64_DEBUG_CALL
12163 "printf(\"frs1 = %#x\\n\",frs1); \n"
12165 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12166 #if RISCV64_DEBUG_CALL
12167 "printf(\"frs2 = %#x\\n\",frs2); \n"
12171 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12172 #if RISCV64_DEBUG_CALL
12173 "printf(\"choose1 = %#x\\n\",choose1); \n"
12179 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12180 #if RISCV64_DEBUG_CALL
12181 "printf(\"choose1 = %#x\\n\",choose1); \n"
12184 "res = fsub_s(frs1, frs2, choose1);\n"
12185 #if RISCV64_DEBUG_CALL
12186 "printf(\"res = %#x\\n\",res); \n"
12189 #if RISCV64_DEBUG_CALL
12190 "printf(\"upper = %#lx\\n\",upper); \n"
12192 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12193 #if RISCV64_DEBUG_CALL
12194 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12197 "flags = fget_flags();\n"
12198 #if RISCV64_DEBUG_CALL
12199 "printf(\"flags = %#x\\n\",flags); \n"
12201 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12202 #if RISCV64_DEBUG_CALL
12203 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12241 partInit.
code() = std::string(
"//fdiv.s\n")+
12242 "etiss_uint32 temp = 0;\n"
12243 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12244 #if RISCV64_Pipeline1
12245 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12246 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12247 "etiss_uint32 num_stages = 4;\n"
12248 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12249 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12251 #if RISCV64_Pipeline2
12252 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12253 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12254 "etiss_uint32 num_stages = 4;\n"
12255 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12256 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12259 "etiss_uint32 res = 0;\n"
12260 "etiss_int64 upper = 0;\n"
12261 "etiss_uint32 flags = 0;\n"
12262 "etiss_uint32 frs1 = 0;\n"
12263 "etiss_uint32 choose1 = 0;\n"
12264 "etiss_uint32 frs2 = 0;\n"
12270 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12271 #if RISCV64_DEBUG_CALL
12272 "printf(\"choose1 = %#x\\n\",choose1); \n"
12278 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12279 #if RISCV64_DEBUG_CALL
12280 "printf(\"choose1 = %#x\\n\",choose1); \n"
12283 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fdiv_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], choose1);\n"
12284 #if RISCV64_DEBUG_CALL
12285 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12291 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12292 #if RISCV64_DEBUG_CALL
12293 "printf(\"frs1 = %#x\\n\",frs1); \n"
12295 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12296 #if RISCV64_DEBUG_CALL
12297 "printf(\"frs2 = %#x\\n\",frs2); \n"
12301 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12302 #if RISCV64_DEBUG_CALL
12303 "printf(\"choose1 = %#x\\n\",choose1); \n"
12309 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12310 #if RISCV64_DEBUG_CALL
12311 "printf(\"choose1 = %#x\\n\",choose1); \n"
12314 "res = fdiv_s(frs1, frs2, choose1);\n"
12315 #if RISCV64_DEBUG_CALL
12316 "printf(\"res = %#x\\n\",res); \n"
12319 #if RISCV64_DEBUG_CALL
12320 "printf(\"upper = %#lx\\n\",upper); \n"
12322 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12323 #if RISCV64_DEBUG_CALL
12324 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12327 "flags = fget_flags();\n"
12328 #if RISCV64_DEBUG_CALL
12329 "printf(\"flags = %#x\\n\",flags); \n"
12331 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12332 #if RISCV64_DEBUG_CALL
12333 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12367 partInit.
code() = std::string(
"//fsqrt.s\n")+
12368 "etiss_uint32 temp = 0;\n"
12369 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12370 #if RISCV64_Pipeline1
12371 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12372 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12373 "etiss_uint32 num_stages = 4;\n"
12374 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12375 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12377 #if RISCV64_Pipeline2
12378 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12379 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12380 "etiss_uint32 num_stages = 4;\n"
12381 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12382 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12385 "etiss_uint32 res = 0;\n"
12386 "etiss_int64 upper = 0;\n"
12387 "etiss_uint32 flags = 0;\n"
12388 "etiss_uint32 frs1 = 0;\n"
12389 "etiss_uint32 choose1 = 0;\n"
12395 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12396 #if RISCV64_DEBUG_CALL
12397 "printf(\"choose1 = %#x\\n\",choose1); \n"
12403 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12404 #if RISCV64_DEBUG_CALL
12405 "printf(\"choose1 = %#x\\n\",choose1); \n"
12408 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsqrt_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], choose1);\n"
12409 #if RISCV64_DEBUG_CALL
12410 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12416 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12417 #if RISCV64_DEBUG_CALL
12418 "printf(\"frs1 = %#x\\n\",frs1); \n"
12422 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
12423 #if RISCV64_DEBUG_CALL
12424 "printf(\"choose1 = %#x\\n\",choose1); \n"
12430 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
12431 #if RISCV64_DEBUG_CALL
12432 "printf(\"choose1 = %#x\\n\",choose1); \n"
12435 "res = fsqrt_s(frs1, choose1);\n"
12436 #if RISCV64_DEBUG_CALL
12437 "printf(\"res = %#x\\n\",res); \n"
12440 #if RISCV64_DEBUG_CALL
12441 "printf(\"upper = %#lx\\n\",upper); \n"
12443 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12444 #if RISCV64_DEBUG_CALL
12445 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12448 "flags = fget_flags();\n"
12449 #if RISCV64_DEBUG_CALL
12450 "printf(\"flags = %#x\\n\",flags); \n"
12452 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12453 #if RISCV64_DEBUG_CALL
12454 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12490 partInit.
code() = std::string(
"//fsgnj.s\n")+
12491 "etiss_uint32 temp = 0;\n"
12492 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12493 #if RISCV64_Pipeline1
12494 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12495 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12496 "etiss_uint32 num_stages = 4;\n"
12497 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12498 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12500 #if RISCV64_Pipeline2
12501 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12502 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12503 "etiss_uint32 num_stages = 4;\n"
12504 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12505 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12508 "etiss_uint32 res = 0;\n"
12509 "etiss_int64 upper = 0;\n"
12510 "etiss_uint32 frs1 = 0;\n"
12511 "etiss_uint32 frs2 = 0;\n"
12515 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 2147483647) | (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & -2147483648));\n"
12516 #if RISCV64_DEBUG_CALL
12517 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12523 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12524 #if RISCV64_DEBUG_CALL
12525 "printf(\"frs1 = %#x\\n\",frs1); \n"
12527 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12528 #if RISCV64_DEBUG_CALL
12529 "printf(\"frs2 = %#x\\n\",frs2); \n"
12531 "res = ((frs1 & 2147483647) | (frs2 & -2147483648));\n"
12532 #if RISCV64_DEBUG_CALL
12533 "printf(\"res = %#x\\n\",res); \n"
12536 #if RISCV64_DEBUG_CALL
12537 "printf(\"upper = %#lx\\n\",upper); \n"
12539 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12540 #if RISCV64_DEBUG_CALL
12541 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12578 partInit.
code() = std::string(
"//fsgnjn.s\n")+
12579 "etiss_uint32 temp = 0;\n"
12580 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12581 #if RISCV64_Pipeline1
12582 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12583 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12584 "etiss_uint32 num_stages = 4;\n"
12585 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12586 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12588 #if RISCV64_Pipeline2
12589 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12590 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12591 "etiss_uint32 num_stages = 4;\n"
12592 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12593 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12596 "etiss_uint32 res = 0;\n"
12597 "etiss_int64 upper = 0;\n"
12598 "etiss_uint32 frs1 = 0;\n"
12599 "etiss_uint32 frs2 = 0;\n"
12603 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 2147483647) | (~((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & -2147483648))&0xffffffffffffffff;\n"
12604 #if RISCV64_DEBUG_CALL
12605 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12611 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12612 #if RISCV64_DEBUG_CALL
12613 "printf(\"frs1 = %#x\\n\",frs1); \n"
12615 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12616 #if RISCV64_DEBUG_CALL
12617 "printf(\"frs2 = %#x\\n\",frs2); \n"
12619 "res = ((frs1 & 2147483647) | (~frs2 & -2147483648))&0xffffffff;\n"
12620 #if RISCV64_DEBUG_CALL
12621 "printf(\"res = %#x\\n\",res); \n"
12624 #if RISCV64_DEBUG_CALL
12625 "printf(\"upper = %#lx\\n\",upper); \n"
12627 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12628 #if RISCV64_DEBUG_CALL
12629 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12666 partInit.
code() = std::string(
"//fsgnjx.s\n")+
12667 "etiss_uint32 temp = 0;\n"
12668 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12669 #if RISCV64_Pipeline1
12670 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12671 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12672 "etiss_uint32 num_stages = 4;\n"
12673 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12674 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12676 #if RISCV64_Pipeline2
12677 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12678 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12679 "etiss_uint32 num_stages = 4;\n"
12680 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12681 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12684 "etiss_uint32 res = 0;\n"
12685 "etiss_int64 upper = 0;\n"
12686 "etiss_uint32 frs1 = 0;\n"
12687 "etiss_uint32 frs2 = 0;\n"
12691 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = (((RISCV64*)cpu)->F[" +
toString(rs1) +
"] ^ (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & -2147483648));\n"
12692 #if RISCV64_DEBUG_CALL
12693 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12699 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12700 #if RISCV64_DEBUG_CALL
12701 "printf(\"frs1 = %#x\\n\",frs1); \n"
12703 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12704 #if RISCV64_DEBUG_CALL
12705 "printf(\"frs2 = %#x\\n\",frs2); \n"
12707 "res = (frs1 ^ (frs2 & -2147483648));\n"
12708 #if RISCV64_DEBUG_CALL
12709 "printf(\"res = %#x\\n\",res); \n"
12712 #if RISCV64_DEBUG_CALL
12713 "printf(\"upper = %#lx\\n\",upper); \n"
12715 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12716 #if RISCV64_DEBUG_CALL
12717 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12752 partInit.
code() = std::string(
"//fmin.s\n")+
12753 "etiss_uint32 temp = 0;\n"
12754 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12755 #if RISCV64_Pipeline1
12756 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12757 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12758 "etiss_uint32 num_stages = 4;\n"
12759 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12760 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12762 #if RISCV64_Pipeline2
12763 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12764 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12765 "etiss_uint32 num_stages = 4;\n"
12766 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12767 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12770 "etiss_uint32 res = 0;\n"
12771 "etiss_int64 upper = 0;\n"
12772 "etiss_uint32 flags = 0;\n"
12773 "etiss_uint32 frs1 = 0;\n"
12774 "etiss_uint32 frs2 = 0;\n"
12778 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsel_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)0);\n"
12779 #if RISCV64_DEBUG_CALL
12780 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12786 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12787 #if RISCV64_DEBUG_CALL
12788 "printf(\"frs1 = %#x\\n\",frs1); \n"
12790 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12791 #if RISCV64_DEBUG_CALL
12792 "printf(\"frs2 = %#x\\n\",frs2); \n"
12794 "res = fsel_s(frs1, frs2, (etiss_uint32)0);\n"
12795 #if RISCV64_DEBUG_CALL
12796 "printf(\"res = %#x\\n\",res); \n"
12799 #if RISCV64_DEBUG_CALL
12800 "printf(\"upper = %#lx\\n\",upper); \n"
12802 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12803 #if RISCV64_DEBUG_CALL
12804 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12807 "flags = fget_flags();\n"
12808 #if RISCV64_DEBUG_CALL
12809 "printf(\"flags = %#x\\n\",flags); \n"
12811 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12812 #if RISCV64_DEBUG_CALL
12813 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12847 partInit.
code() = std::string(
"//fmax.s\n")+
12848 "etiss_uint32 temp = 0;\n"
12849 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12850 #if RISCV64_Pipeline1
12851 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12852 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12853 "etiss_uint32 num_stages = 4;\n"
12854 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12855 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12857 #if RISCV64_Pipeline2
12858 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12859 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12860 "etiss_uint32 num_stages = 4;\n"
12861 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12862 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12865 "etiss_uint32 res = 0;\n"
12866 "etiss_int64 upper = 0;\n"
12867 "etiss_uint32 flags = 0;\n"
12868 "etiss_uint32 frs1 = 0;\n"
12869 "etiss_uint32 frs2 = 0;\n"
12873 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fsel_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)1);\n"
12874 #if RISCV64_DEBUG_CALL
12875 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12881 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12882 #if RISCV64_DEBUG_CALL
12883 "printf(\"frs1 = %#x\\n\",frs1); \n"
12885 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
12886 #if RISCV64_DEBUG_CALL
12887 "printf(\"frs2 = %#x\\n\",frs2); \n"
12889 "res = fsel_s(frs1, frs2, (etiss_uint32)1);\n"
12890 #if RISCV64_DEBUG_CALL
12891 "printf(\"res = %#x\\n\",res); \n"
12894 #if RISCV64_DEBUG_CALL
12895 "printf(\"upper = %#lx\\n\",upper); \n"
12897 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
12898 #if RISCV64_DEBUG_CALL
12899 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
12902 "flags = fget_flags();\n"
12903 #if RISCV64_DEBUG_CALL
12904 "printf(\"flags = %#x\\n\",flags); \n"
12906 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12907 #if RISCV64_DEBUG_CALL
12908 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
12942 partInit.
code() = std::string(
"//fcvt.w.s\n")+
12943 "etiss_uint32 temp = 0;\n"
12944 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
12945 #if RISCV64_Pipeline1
12946 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12947 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12948 "etiss_uint32 num_stages = 4;\n"
12949 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12950 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12952 #if RISCV64_Pipeline2
12953 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
12954 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
12955 "etiss_uint32 num_stages = 4;\n"
12956 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
12957 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
12960 "etiss_uint32 flags = 0;\n"
12961 "etiss_uint32 frs1 = 0;\n"
12965 "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
12966 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
12968 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
12970 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
12971 #if RISCV64_DEBUG_CALL
12972 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
12978 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
12979 #if RISCV64_DEBUG_CALL
12980 "printf(\"frs1 = %#x\\n\",frs1); \n"
12982 "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
12983 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
12985 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
12987 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
12988 #if RISCV64_DEBUG_CALL
12989 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
12992 "flags = fget_flags();\n"
12993 #if RISCV64_DEBUG_CALL
12994 "printf(\"flags = %#x\\n\",flags); \n"
12996 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
12997 #if RISCV64_DEBUG_CALL
12998 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13032 partInit.
code() = std::string(
"//fcvt.wu.s\n")+
13033 "etiss_uint32 temp = 0;\n"
13034 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13035 #if RISCV64_Pipeline1
13036 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13037 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13038 "etiss_uint32 num_stages = 4;\n"
13039 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13040 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13042 #if RISCV64_Pipeline2
13043 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13044 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13045 "etiss_uint32 num_stages = 4;\n"
13046 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13047 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13050 "etiss_uint32 flags = 0;\n"
13051 "etiss_uint32 frs1 = 0;\n"
13055 "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
13056 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
13058 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
13060 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
13061 #if RISCV64_DEBUG_CALL
13062 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13068 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13069 #if RISCV64_DEBUG_CALL
13070 "printf(\"frs1 = %#x\\n\",frs1); \n"
13072 "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
13073 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
13075 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
13077 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_1;\n"
13078 #if RISCV64_DEBUG_CALL
13079 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13082 "flags = fget_flags();\n"
13083 #if RISCV64_DEBUG_CALL
13084 "printf(\"flags = %#x\\n\",flags); \n"
13086 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13087 #if RISCV64_DEBUG_CALL
13088 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13122 partInit.
code() = std::string(
"//fcvt.l.s\n")+
13123 "etiss_uint32 temp = 0;\n"
13124 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13125 #if RISCV64_Pipeline1
13126 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13127 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13128 "etiss_uint32 num_stages = 4;\n"
13129 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13130 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13132 #if RISCV64_Pipeline2
13133 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13134 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13135 "etiss_uint32 num_stages = 4;\n"
13136 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13137 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13140 "etiss_uint64 res = 0;\n"
13141 "etiss_uint32 flags = 0;\n"
13143 "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]), (etiss_uint32)0, (" +
toString(rm) +
" & 0xff));\n"
13144 #if RISCV64_DEBUG_CALL
13145 "printf(\"res = %#lx\\n\",res); \n"
13147 "etiss_int64 cast_0 = res; \n"
13148 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
13150 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
13152 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
13153 #if RISCV64_DEBUG_CALL
13154 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13156 "flags = fget_flags();\n"
13157 #if RISCV64_DEBUG_CALL
13158 "printf(\"flags = %#x\\n\",flags); \n"
13160 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13161 #if RISCV64_DEBUG_CALL
13162 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13196 partInit.
code() = std::string(
"//fcvt.lu.s\n")+
13197 "etiss_uint32 temp = 0;\n"
13198 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13199 #if RISCV64_Pipeline1
13200 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13201 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13202 "etiss_uint32 num_stages = 4;\n"
13203 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13204 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13206 #if RISCV64_Pipeline2
13207 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13208 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13209 "etiss_uint32 num_stages = 4;\n"
13210 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13211 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13214 "etiss_uint64 res = 0;\n"
13215 "etiss_uint32 flags = 0;\n"
13217 "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]), (etiss_uint32)1, (" +
toString(rm) +
" & 0xff));\n"
13218 #if RISCV64_DEBUG_CALL
13219 "printf(\"res = %#lx\\n\",res); \n"
13221 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)res;\n"
13222 #if RISCV64_DEBUG_CALL
13223 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13225 "flags = fget_flags();\n"
13226 #if RISCV64_DEBUG_CALL
13227 "printf(\"flags = %#x\\n\",flags); \n"
13229 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13230 #if RISCV64_DEBUG_CALL
13231 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13265 partInit.
code() = std::string(
"//feq.s\n")+
13266 "etiss_uint32 temp = 0;\n"
13267 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13268 #if RISCV64_Pipeline1
13269 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13270 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13271 "etiss_uint32 num_stages = 4;\n"
13272 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13273 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13275 #if RISCV64_Pipeline2
13276 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13277 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13278 "etiss_uint32 num_stages = 4;\n"
13279 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13280 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13283 "etiss_uint32 flags = 0;\n"
13284 "etiss_uint32 frs1 = 0;\n"
13285 "etiss_uint32 frs2 = 0;\n"
13289 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)0);\n"
13290 #if RISCV64_DEBUG_CALL
13291 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13297 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13298 #if RISCV64_DEBUG_CALL
13299 "printf(\"frs1 = %#x\\n\",frs1); \n"
13301 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
13302 #if RISCV64_DEBUG_CALL
13303 "printf(\"frs2 = %#x\\n\",frs2); \n"
13305 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)0);\n"
13306 #if RISCV64_DEBUG_CALL
13307 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13310 "flags = fget_flags();\n"
13311 #if RISCV64_DEBUG_CALL
13312 "printf(\"flags = %#x\\n\",flags); \n"
13314 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13315 #if RISCV64_DEBUG_CALL
13316 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13350 partInit.
code() = std::string(
"//flt.s\n")+
13351 "etiss_uint32 temp = 0;\n"
13352 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13353 #if RISCV64_Pipeline1
13354 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13355 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13356 "etiss_uint32 num_stages = 4;\n"
13357 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13358 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13360 #if RISCV64_Pipeline2
13361 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13362 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13363 "etiss_uint32 num_stages = 4;\n"
13364 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13365 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13368 "etiss_uint32 flags = 0;\n"
13369 "etiss_uint32 frs1 = 0;\n"
13370 "etiss_uint32 frs2 = 0;\n"
13374 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)2);\n"
13375 #if RISCV64_DEBUG_CALL
13376 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13382 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13383 #if RISCV64_DEBUG_CALL
13384 "printf(\"frs1 = %#x\\n\",frs1); \n"
13386 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
13387 #if RISCV64_DEBUG_CALL
13388 "printf(\"frs2 = %#x\\n\",frs2); \n"
13390 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)2);\n"
13391 #if RISCV64_DEBUG_CALL
13392 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13395 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = fcmp_s((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffff), (etiss_uint32)2);\n"
13396 #if RISCV64_DEBUG_CALL
13397 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13399 "flags = fget_flags();\n"
13400 #if RISCV64_DEBUG_CALL
13401 "printf(\"flags = %#x\\n\",flags); \n"
13403 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13404 #if RISCV64_DEBUG_CALL
13405 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13439 partInit.
code() = std::string(
"//fle.s\n")+
13440 "etiss_uint32 temp = 0;\n"
13441 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13442 #if RISCV64_Pipeline1
13443 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13444 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13445 "etiss_uint32 num_stages = 4;\n"
13446 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13447 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13449 #if RISCV64_Pipeline2
13450 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13451 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13452 "etiss_uint32 num_stages = 4;\n"
13453 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13454 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13457 "etiss_uint32 flags = 0;\n"
13458 "etiss_uint32 frs1 = 0;\n"
13459 "etiss_uint32 frs2 = 0;\n"
13463 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"], ((RISCV64*)cpu)->F[" +
toString(rs2) +
"], (etiss_uint32)1);\n"
13464 #if RISCV64_DEBUG_CALL
13465 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13471 "frs1 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]);\n"
13472 #if RISCV64_DEBUG_CALL
13473 "printf(\"frs1 = %#x\\n\",frs1); \n"
13475 "frs2 = unbox_s(((RISCV64*)cpu)->F[" +
toString(rs2) +
"]);\n"
13476 #if RISCV64_DEBUG_CALL
13477 "printf(\"frs2 = %#x\\n\",frs2); \n"
13479 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)1);\n"
13480 #if RISCV64_DEBUG_CALL
13481 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13484 "flags = fget_flags();\n"
13485 #if RISCV64_DEBUG_CALL
13486 "printf(\"flags = %#x\\n\",flags); \n"
13488 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
13489 #if RISCV64_DEBUG_CALL
13490 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
13520 partInit.
code() = std::string(
"//fclass.s\n")+
13521 "etiss_uint32 temp = 0;\n"
13522 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13523 #if RISCV64_Pipeline1
13524 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13525 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13526 "etiss_uint32 num_stages = 4;\n"
13527 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13528 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13530 #if RISCV64_Pipeline2
13531 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13532 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13533 "etiss_uint32 num_stages = 4;\n"
13534 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13535 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13539 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = fclass_s(unbox_s(((RISCV64*)cpu)->F[" +
toString(rs1) +
"]));\n"
13540 #if RISCV64_DEBUG_CALL
13541 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13572 partInit.
code() = std::string(
"//fmv.x.w\n")+
13573 "etiss_uint32 temp = 0;\n"
13574 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13575 #if RISCV64_Pipeline1
13576 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13577 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13578 "etiss_uint32 num_stages = 4;\n"
13579 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13580 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13582 #if RISCV64_Pipeline2
13583 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13584 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13585 "etiss_uint32 num_stages = 4;\n"
13586 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13587 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13591 "etiss_int64 cast_0 = (((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffff); \n"
13592 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
13594 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
13596 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
13597 #if RISCV64_DEBUG_CALL
13598 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
13632 partInit.
code() = std::string(
"//fcvt.s.w\n")+
13633 "etiss_uint32 temp = 0;\n"
13634 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13635 #if RISCV64_Pipeline1
13636 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13637 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13638 "etiss_uint32 num_stages = 4;\n"
13639 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13640 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13642 #if RISCV64_Pipeline2
13643 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13644 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13645 "etiss_uint32 num_stages = 4;\n"
13646 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13647 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13650 "etiss_uint32 res = 0;\n"
13651 "etiss_int64 upper = 0;\n"
13655 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
13656 #if RISCV64_DEBUG_CALL
13657 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13663 "res = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
13664 #if RISCV64_DEBUG_CALL
13665 "printf(\"res = %#x\\n\",res); \n"
13668 #if RISCV64_DEBUG_CALL
13669 "printf(\"upper = %#lx\\n\",upper); \n"
13671 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13672 #if RISCV64_DEBUG_CALL
13673 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13708 partInit.
code() = std::string(
"//fcvt.s.wu\n")+
13709 "etiss_uint32 temp = 0;\n"
13710 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13711 #if RISCV64_Pipeline1
13712 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13713 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13714 "etiss_uint32 num_stages = 4;\n"
13715 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13716 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13718 #if RISCV64_Pipeline2
13719 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13720 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13721 "etiss_uint32 num_stages = 4;\n"
13722 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13723 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13726 "etiss_uint32 res = 0;\n"
13727 "etiss_int64 upper = 0;\n"
13731 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
13732 #if RISCV64_DEBUG_CALL
13733 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13739 "res = fcvt_s((*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
13740 #if RISCV64_DEBUG_CALL
13741 "printf(\"res = %#x\\n\",res); \n"
13744 #if RISCV64_DEBUG_CALL
13745 "printf(\"upper = %#lx\\n\",upper); \n"
13747 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13748 #if RISCV64_DEBUG_CALL
13749 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13784 partInit.
code() = std::string(
"//fcvt.s.l\n")+
13785 "etiss_uint32 temp = 0;\n"
13786 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13787 #if RISCV64_Pipeline1
13788 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13789 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13790 "etiss_uint32 num_stages = 4;\n"
13791 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13792 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13794 #if RISCV64_Pipeline2
13795 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13796 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13797 "etiss_uint32 num_stages = 4;\n"
13798 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13799 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13802 "etiss_uint32 res = 0;\n"
13803 "etiss_int64 upper = 0;\n"
13805 "res = fcvt_64_32(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"], (etiss_uint32)2);\n"
13806 #if RISCV64_DEBUG_CALL
13807 "printf(\"res = %#x\\n\",res); \n"
13811 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
13812 #if RISCV64_DEBUG_CALL
13813 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13820 #if RISCV64_DEBUG_CALL
13821 "printf(\"upper = %#lx\\n\",upper); \n"
13823 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13824 #if RISCV64_DEBUG_CALL
13825 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13860 partInit.
code() = std::string(
"//fcvt.s.lu\n")+
13861 "etiss_uint32 temp = 0;\n"
13862 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13863 #if RISCV64_Pipeline1
13864 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13865 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13866 "etiss_uint32 num_stages = 4;\n"
13867 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13868 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13870 #if RISCV64_Pipeline2
13871 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13872 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13873 "etiss_uint32 num_stages = 4;\n"
13874 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13875 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13878 "etiss_uint32 res = 0;\n"
13879 "etiss_int64 upper = 0;\n"
13881 "res = fcvt_64_32(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"], (etiss_uint32)3);\n"
13882 #if RISCV64_DEBUG_CALL
13883 "printf(\"res = %#x\\n\",res); \n"
13887 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
13888 #if RISCV64_DEBUG_CALL
13889 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13896 #if RISCV64_DEBUG_CALL
13897 "printf(\"upper = %#lx\\n\",upper); \n"
13899 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)res);\n"
13900 #if RISCV64_DEBUG_CALL
13901 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13933 partInit.
code() = std::string(
"//fmv.w.x\n")+
13934 "etiss_uint32 temp = 0;\n"
13935 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
13936 #if RISCV64_Pipeline1
13937 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13938 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13939 "etiss_uint32 num_stages = 4;\n"
13940 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13941 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13943 #if RISCV64_Pipeline2
13944 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
13945 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
13946 "etiss_uint32 num_stages = 4;\n"
13947 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
13948 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
13951 "etiss_int64 upper = 0;\n"
13955 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff);\n"
13956 #if RISCV64_DEBUG_CALL
13957 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
13964 #if RISCV64_DEBUG_CALL
13965 "printf(\"upper = %#lx\\n\",upper); \n"
13967 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 32) | (etiss_uint64)(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff));\n"
13968 #if RISCV64_DEBUG_CALL
13969 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14008 partInit.
code() = std::string(
"//fsub.d\n")+
14009 "etiss_uint32 temp = 0;\n"
14010 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14011 #if RISCV64_Pipeline1
14012 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14013 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14014 "etiss_uint32 num_stages = 4;\n"
14015 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14016 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14018 #if RISCV64_Pipeline2
14019 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14020 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14021 "etiss_uint32 num_stages = 4;\n"
14022 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14023 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14026 "etiss_uint64 res = 0;\n"
14027 "etiss_int64 upper = 0;\n"
14028 "etiss_uint32 flags = 0;\n"
14029 "etiss_uint32 choose1 = 0;\n"
14033 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
14034 #if RISCV64_DEBUG_CALL
14035 "printf(\"choose1 = %#x\\n\",choose1); \n"
14041 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
14042 #if RISCV64_DEBUG_CALL
14043 "printf(\"choose1 = %#x\\n\",choose1); \n"
14046 "res = fsub_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
14047 #if RISCV64_DEBUG_CALL
14048 "printf(\"res = %#lx\\n\",res); \n"
14052 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14053 #if RISCV64_DEBUG_CALL
14054 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14061 #if RISCV64_DEBUG_CALL
14062 "printf(\"upper = %#lx\\n\",upper); \n"
14064 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14065 #if RISCV64_DEBUG_CALL
14066 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14069 "flags = fget_flags();\n"
14070 #if RISCV64_DEBUG_CALL
14071 "printf(\"flags = %#x\\n\",flags); \n"
14073 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14074 #if RISCV64_DEBUG_CALL
14075 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14113 partInit.
code() = std::string(
"//fdiv.d\n")+
14114 "etiss_uint32 temp = 0;\n"
14115 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14116 #if RISCV64_Pipeline1
14117 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14118 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14119 "etiss_uint32 num_stages = 4;\n"
14120 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14121 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14123 #if RISCV64_Pipeline2
14124 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14125 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14126 "etiss_uint32 num_stages = 4;\n"
14127 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14128 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14131 "etiss_uint64 res = 0;\n"
14132 "etiss_int64 upper = 0;\n"
14133 "etiss_uint32 flags = 0;\n"
14134 "etiss_uint32 choose1 = 0;\n"
14138 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
14139 #if RISCV64_DEBUG_CALL
14140 "printf(\"choose1 = %#x\\n\",choose1); \n"
14146 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
14147 #if RISCV64_DEBUG_CALL
14148 "printf(\"choose1 = %#x\\n\",choose1); \n"
14151 "res = fdiv_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), choose1);\n"
14152 #if RISCV64_DEBUG_CALL
14153 "printf(\"res = %#lx\\n\",res); \n"
14157 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14158 #if RISCV64_DEBUG_CALL
14159 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14166 #if RISCV64_DEBUG_CALL
14167 "printf(\"upper = %#lx\\n\",upper); \n"
14169 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14170 #if RISCV64_DEBUG_CALL
14171 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14174 "flags = fget_flags();\n"
14175 #if RISCV64_DEBUG_CALL
14176 "printf(\"flags = %#x\\n\",flags); \n"
14178 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14179 #if RISCV64_DEBUG_CALL
14180 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14214 partInit.
code() = std::string(
"//fsqrt.d\n")+
14215 "etiss_uint32 temp = 0;\n"
14216 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14217 #if RISCV64_Pipeline1
14218 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14219 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14220 "etiss_uint32 num_stages = 4;\n"
14221 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14222 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14224 #if RISCV64_Pipeline2
14225 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14226 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14227 "etiss_uint32 num_stages = 4;\n"
14228 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14229 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14232 "etiss_uint64 res = 0;\n"
14233 "etiss_int64 upper = 0;\n"
14234 "etiss_uint32 flags = 0;\n"
14235 "etiss_uint32 choose1 = 0;\n"
14239 "choose1 = (" +
toString(rm) +
" & 0xff);\n"
14240 #if RISCV64_DEBUG_CALL
14241 "printf(\"choose1 = %#x\\n\",choose1); \n"
14247 "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n"
14248 #if RISCV64_DEBUG_CALL
14249 "printf(\"choose1 = %#x\\n\",choose1); \n"
14252 "res = fsqrt_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), choose1);\n"
14253 #if RISCV64_DEBUG_CALL
14254 "printf(\"res = %#lx\\n\",res); \n"
14258 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14259 #if RISCV64_DEBUG_CALL
14260 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14267 #if RISCV64_DEBUG_CALL
14268 "printf(\"upper = %#lx\\n\",upper); \n"
14270 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14271 #if RISCV64_DEBUG_CALL
14272 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14275 "flags = fget_flags();\n"
14276 #if RISCV64_DEBUG_CALL
14277 "printf(\"flags = %#x\\n\",flags); \n"
14279 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14280 #if RISCV64_DEBUG_CALL
14281 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14317 partInit.
code() = std::string(
"//fsgnj.d\n")+
14318 "etiss_uint32 temp = 0;\n"
14319 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14320 #if RISCV64_Pipeline1
14321 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14322 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14323 "etiss_uint32 num_stages = 4;\n"
14324 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14325 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14327 #if RISCV64_Pipeline2
14328 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14329 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14330 "etiss_uint32 num_stages = 4;\n"
14331 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14332 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14335 "etiss_uint64 res = 0;\n"
14336 "etiss_int64 ONE = 0;\n"
14337 "etiss_int64 upper = 0;\n"
14338 "etiss_int64 MSK1 = 0;\n"
14339 "etiss_int64 MSK2 = 0;\n"
14342 #if RISCV64_DEBUG_CALL
14343 "printf(\"ONE = %#lx\\n\",ONE); \n"
14345 "MSK1 = (ONE << 63);\n"
14346 #if RISCV64_DEBUG_CALL
14347 "printf(\"MSK1 = %#lx\\n\",MSK1); \n"
14349 "MSK2 = MSK1 - 1;\n"
14350 #if RISCV64_DEBUG_CALL
14351 "printf(\"MSK2 = %#lx\\n\",MSK2); \n"
14353 "res = (((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff) & MSK2) | ((((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff) & MSK1));\n"
14354 #if RISCV64_DEBUG_CALL
14355 "printf(\"res = %#lx\\n\",res); \n"
14359 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14360 #if RISCV64_DEBUG_CALL
14361 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14368 #if RISCV64_DEBUG_CALL
14369 "printf(\"upper = %#lx\\n\",upper); \n"
14371 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14372 #if RISCV64_DEBUG_CALL
14373 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14410 partInit.
code() = std::string(
"//fsgnjn.d\n")+
14411 "etiss_uint32 temp = 0;\n"
14412 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14413 #if RISCV64_Pipeline1
14414 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14415 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14416 "etiss_uint32 num_stages = 4;\n"
14417 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14418 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14420 #if RISCV64_Pipeline2
14421 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14422 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14423 "etiss_uint32 num_stages = 4;\n"
14424 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14425 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14428 "etiss_uint64 res = 0;\n"
14429 "etiss_int64 ONE = 0;\n"
14430 "etiss_int64 upper = 0;\n"
14431 "etiss_int64 MSK1 = 0;\n"
14432 "etiss_int64 MSK2 = 0;\n"
14435 #if RISCV64_DEBUG_CALL
14436 "printf(\"ONE = %#lx\\n\",ONE); \n"
14438 "MSK1 = (ONE << 63);\n"
14439 #if RISCV64_DEBUG_CALL
14440 "printf(\"MSK1 = %#lx\\n\",MSK1); \n"
14442 "MSK2 = MSK1 - 1;\n"
14443 #if RISCV64_DEBUG_CALL
14444 "printf(\"MSK2 = %#lx\\n\",MSK2); \n"
14446 "res = (((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff) & MSK2) | (~(((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff) & MSK1))&0xffffffffffffffff;\n"
14447 #if RISCV64_DEBUG_CALL
14448 "printf(\"res = %#lx\\n\",res); \n"
14452 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14453 #if RISCV64_DEBUG_CALL
14454 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14461 #if RISCV64_DEBUG_CALL
14462 "printf(\"upper = %#lx\\n\",upper); \n"
14464 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14465 #if RISCV64_DEBUG_CALL
14466 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14503 partInit.
code() = std::string(
"//fsgnjx.d\n")+
14504 "etiss_uint32 temp = 0;\n"
14505 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14506 #if RISCV64_Pipeline1
14507 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14508 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14509 "etiss_uint32 num_stages = 4;\n"
14510 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14511 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14513 #if RISCV64_Pipeline2
14514 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14515 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14516 "etiss_uint32 num_stages = 4;\n"
14517 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14518 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14521 "etiss_uint64 res = 0;\n"
14522 "etiss_int64 ONE = 0;\n"
14523 "etiss_int64 upper = 0;\n"
14524 "etiss_int64 MSK1 = 0;\n"
14527 #if RISCV64_DEBUG_CALL
14528 "printf(\"ONE = %#lx\\n\",ONE); \n"
14530 "MSK1 = (ONE << 63);\n"
14531 #if RISCV64_DEBUG_CALL
14532 "printf(\"MSK1 = %#lx\\n\",MSK1); \n"
14534 "res = ((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff) ^ ((((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff) & MSK1));\n"
14535 #if RISCV64_DEBUG_CALL
14536 "printf(\"res = %#lx\\n\",res); \n"
14540 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14541 #if RISCV64_DEBUG_CALL
14542 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14549 #if RISCV64_DEBUG_CALL
14550 "printf(\"upper = %#lx\\n\",upper); \n"
14552 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14553 #if RISCV64_DEBUG_CALL
14554 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14589 partInit.
code() = std::string(
"//fmin.d\n")+
14590 "etiss_uint32 temp = 0;\n"
14591 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14592 #if RISCV64_Pipeline1
14593 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14594 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14595 "etiss_uint32 num_stages = 4;\n"
14596 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14597 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14599 #if RISCV64_Pipeline2
14600 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14601 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14602 "etiss_uint32 num_stages = 4;\n"
14603 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14604 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14607 "etiss_uint64 res = 0;\n"
14608 "etiss_int64 upper = 0;\n"
14609 "etiss_uint32 flags = 0;\n"
14611 "res = fsel_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)0);\n"
14612 #if RISCV64_DEBUG_CALL
14613 "printf(\"res = %#lx\\n\",res); \n"
14617 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14618 #if RISCV64_DEBUG_CALL
14619 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14626 #if RISCV64_DEBUG_CALL
14627 "printf(\"upper = %#lx\\n\",upper); \n"
14629 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14630 #if RISCV64_DEBUG_CALL
14631 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14634 "flags = fget_flags();\n"
14635 #if RISCV64_DEBUG_CALL
14636 "printf(\"flags = %#x\\n\",flags); \n"
14638 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14639 #if RISCV64_DEBUG_CALL
14640 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14674 partInit.
code() = std::string(
"//fmax.d\n")+
14675 "etiss_uint32 temp = 0;\n"
14676 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14677 #if RISCV64_Pipeline1
14678 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14679 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14680 "etiss_uint32 num_stages = 4;\n"
14681 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14682 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14684 #if RISCV64_Pipeline2
14685 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14686 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14687 "etiss_uint32 num_stages = 4;\n"
14688 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14689 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14692 "etiss_uint64 res = 0;\n"
14693 "etiss_int64 upper = 0;\n"
14694 "etiss_uint32 flags = 0;\n"
14696 "res = fsel_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)1);\n"
14697 #if RISCV64_DEBUG_CALL
14698 "printf(\"res = %#lx\\n\",res); \n"
14702 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14703 #if RISCV64_DEBUG_CALL
14704 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14711 #if RISCV64_DEBUG_CALL
14712 "printf(\"upper = %#lx\\n\",upper); \n"
14714 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14715 #if RISCV64_DEBUG_CALL
14716 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14719 "flags = fget_flags();\n"
14720 #if RISCV64_DEBUG_CALL
14721 "printf(\"flags = %#x\\n\",flags); \n"
14723 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14724 #if RISCV64_DEBUG_CALL
14725 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14759 partInit.
code() = std::string(
"//fcvt.d.s\n")+
14760 "etiss_uint32 temp = 0;\n"
14761 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14762 #if RISCV64_Pipeline1
14763 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14764 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14765 "etiss_uint32 num_stages = 4;\n"
14766 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14767 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14769 #if RISCV64_Pipeline2
14770 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14771 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14772 "etiss_uint32 num_stages = 4;\n"
14773 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14774 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14777 "etiss_uint64 res = 0;\n"
14778 "etiss_int64 upper = 0;\n"
14780 "res = fconv_f2d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffff), (" +
toString(rm) +
" & 0xff));\n"
14781 #if RISCV64_DEBUG_CALL
14782 "printf(\"res = %#lx\\n\",res); \n"
14786 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
14787 #if RISCV64_DEBUG_CALL
14788 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14795 #if RISCV64_DEBUG_CALL
14796 "printf(\"upper = %#lx\\n\",upper); \n"
14798 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
14799 #if RISCV64_DEBUG_CALL
14800 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
14835 partInit.
code() = std::string(
"//feq.d\n")+
14836 "etiss_uint32 temp = 0;\n"
14837 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14838 #if RISCV64_Pipeline1
14839 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14840 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14841 "etiss_uint32 num_stages = 4;\n"
14842 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14843 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14845 #if RISCV64_Pipeline2
14846 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14847 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14848 "etiss_uint32 num_stages = 4;\n"
14849 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14850 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14853 "etiss_uint32 flags = 0;\n"
14855 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)0);\n"
14856 #if RISCV64_DEBUG_CALL
14857 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
14859 "flags = fget_flags();\n"
14860 #if RISCV64_DEBUG_CALL
14861 "printf(\"flags = %#x\\n\",flags); \n"
14863 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14864 #if RISCV64_DEBUG_CALL
14865 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14899 partInit.
code() = std::string(
"//flt.d\n")+
14900 "etiss_uint32 temp = 0;\n"
14901 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14902 #if RISCV64_Pipeline1
14903 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14904 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14905 "etiss_uint32 num_stages = 4;\n"
14906 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14907 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14909 #if RISCV64_Pipeline2
14910 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14911 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14912 "etiss_uint32 num_stages = 4;\n"
14913 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14914 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14917 "etiss_uint32 flags = 0;\n"
14919 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)2);\n"
14920 #if RISCV64_DEBUG_CALL
14921 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
14923 "flags = fget_flags();\n"
14924 #if RISCV64_DEBUG_CALL
14925 "printf(\"flags = %#x\\n\",flags); \n"
14927 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14928 #if RISCV64_DEBUG_CALL
14929 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
14963 partInit.
code() = std::string(
"//fle.d\n")+
14964 "etiss_uint32 temp = 0;\n"
14965 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
14966 #if RISCV64_Pipeline1
14967 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14968 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14969 "etiss_uint32 num_stages = 4;\n"
14970 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14971 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14973 #if RISCV64_Pipeline2
14974 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
14975 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
14976 "etiss_uint32 num_stages = 4;\n"
14977 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
14978 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
14981 "etiss_uint32 flags = 0;\n"
14983 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff), (etiss_uint32)1);\n"
14984 #if RISCV64_DEBUG_CALL
14985 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
14987 "flags = fget_flags();\n"
14988 #if RISCV64_DEBUG_CALL
14989 "printf(\"flags = %#x\\n\",flags); \n"
14991 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
14992 #if RISCV64_DEBUG_CALL
14993 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15023 partInit.
code() = std::string(
"//fclass.d\n")+
15024 "etiss_uint32 temp = 0;\n"
15025 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15026 #if RISCV64_Pipeline1
15027 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15028 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15029 "etiss_uint32 num_stages = 4;\n"
15030 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15031 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15033 #if RISCV64_Pipeline2
15034 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15035 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15036 "etiss_uint32 num_stages = 4;\n"
15037 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15038 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15042 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = fclass_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff));\n"
15043 #if RISCV64_DEBUG_CALL
15044 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15075 partInit.
code() = std::string(
"//fmv.x.d\n")+
15076 "etiss_uint32 temp = 0;\n"
15077 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15078 #if RISCV64_Pipeline1
15079 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15080 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15081 "etiss_uint32 num_stages = 4;\n"
15082 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15083 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15085 #if RISCV64_Pipeline2
15086 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15087 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15088 "etiss_uint32 num_stages = 4;\n"
15089 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15090 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15094 "etiss_int64 cast_0 = ((RISCV64*)cpu)->F[" +
toString(rs1) +
"]; \n"
15095 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15097 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15099 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15100 #if RISCV64_DEBUG_CALL
15101 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15135 partInit.
code() = std::string(
"//fcvt.w.d\n")+
15136 "etiss_uint32 temp = 0;\n"
15137 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15138 #if RISCV64_Pipeline1
15139 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15140 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15141 "etiss_uint32 num_stages = 4;\n"
15142 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15143 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15145 #if RISCV64_Pipeline2
15146 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15147 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15148 "etiss_uint32 num_stages = 4;\n"
15149 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15150 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15153 "etiss_uint32 flags = 0;\n"
15155 "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
15156 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
15158 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
15160 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15161 #if RISCV64_DEBUG_CALL
15162 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15164 "flags = fget_flags();\n"
15165 #if RISCV64_DEBUG_CALL
15166 "printf(\"flags = %#x\\n\",flags); \n"
15168 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15169 #if RISCV64_DEBUG_CALL
15170 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15204 partInit.
code() = std::string(
"//fcvt.wu.d\n")+
15205 "etiss_uint32 temp = 0;\n"
15206 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15207 #if RISCV64_Pipeline1
15208 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15209 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15210 "etiss_uint32 num_stages = 4;\n"
15211 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15212 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15214 #if RISCV64_Pipeline2
15215 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15216 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15217 "etiss_uint32 num_stages = 4;\n"
15218 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15219 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15222 "etiss_uint32 flags = 0;\n"
15224 "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
15225 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
15227 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
15229 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15230 #if RISCV64_DEBUG_CALL
15231 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15233 "flags = fget_flags();\n"
15234 #if RISCV64_DEBUG_CALL
15235 "printf(\"flags = %#x\\n\",flags); \n"
15237 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15238 #if RISCV64_DEBUG_CALL
15239 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15273 partInit.
code() = std::string(
"//fcvt.l.d\n")+
15274 "etiss_uint32 temp = 0;\n"
15275 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15276 #if RISCV64_Pipeline1
15277 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15278 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15279 "etiss_uint32 num_stages = 4;\n"
15280 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15281 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15283 #if RISCV64_Pipeline2
15284 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15285 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15286 "etiss_uint32 num_stages = 4;\n"
15287 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15288 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15291 "etiss_uint32 flags = 0;\n"
15293 "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)0, (" +
toString(rm) +
" & 0xff)); \n"
15294 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15296 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15298 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15299 #if RISCV64_DEBUG_CALL
15300 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15302 "flags = fget_flags();\n"
15303 #if RISCV64_DEBUG_CALL
15304 "printf(\"flags = %#x\\n\",flags); \n"
15306 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15307 #if RISCV64_DEBUG_CALL
15308 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15342 partInit.
code() = std::string(
"//fcvt.lu.d\n")+
15343 "etiss_uint32 temp = 0;\n"
15344 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15345 #if RISCV64_Pipeline1
15346 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15347 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15348 "etiss_uint32 num_stages = 4;\n"
15349 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15350 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15352 #if RISCV64_Pipeline2
15353 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15354 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15355 "etiss_uint32 num_stages = 4;\n"
15356 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15357 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15360 "etiss_uint32 flags = 0;\n"
15362 "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F[" +
toString(rs1) +
"] & 0xffffffffffffffff), (etiss_uint32)1, (" +
toString(rm) +
" & 0xff)); \n"
15363 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15365 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15367 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
15368 #if RISCV64_DEBUG_CALL
15369 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
15371 "flags = fget_flags();\n"
15372 #if RISCV64_DEBUG_CALL
15373 "printf(\"flags = %#x\\n\",flags); \n"
15375 "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n"
15376 #if RISCV64_DEBUG_CALL
15377 "printf(\"((RISCV64*)cpu)->FCSR = %#x\\n\",((RISCV64*)cpu)->FCSR); \n"
15412 partInit.
code() = std::string(
"//fcvt.d.w\n")+
15413 "etiss_uint32 temp = 0;\n"
15414 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15415 #if RISCV64_Pipeline1
15416 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15417 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15418 "etiss_uint32 num_stages = 4;\n"
15419 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15420 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15422 #if RISCV64_Pipeline2
15423 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15424 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15425 "etiss_uint32 num_stages = 4;\n"
15426 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15427 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15430 "etiss_uint64 res = 0;\n"
15431 "etiss_int64 upper = 0;\n"
15433 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
15434 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15436 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15438 "res = fcvt_32_64((etiss_int64)cast_0, (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
15439 #if RISCV64_DEBUG_CALL
15440 "printf(\"res = %#lx\\n\",res); \n"
15444 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15445 #if RISCV64_DEBUG_CALL
15446 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15453 #if RISCV64_DEBUG_CALL
15454 "printf(\"upper = %#lx\\n\",upper); \n"
15456 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15457 #if RISCV64_DEBUG_CALL
15458 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15494 partInit.
code() = std::string(
"//fcvt.d.wu\n")+
15495 "etiss_uint32 temp = 0;\n"
15496 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15497 #if RISCV64_Pipeline1
15498 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15499 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15500 "etiss_uint32 num_stages = 4;\n"
15501 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15502 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15504 #if RISCV64_Pipeline2
15505 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15506 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15507 "etiss_uint32 num_stages = 4;\n"
15508 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15509 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15512 "etiss_uint64 res = 0;\n"
15513 "etiss_int64 upper = 0;\n"
15515 "res = fcvt_32_64((etiss_uint64)(*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff), (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
15516 #if RISCV64_DEBUG_CALL
15517 "printf(\"res = %#lx\\n\",res); \n"
15521 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15522 #if RISCV64_DEBUG_CALL
15523 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15530 #if RISCV64_DEBUG_CALL
15531 "printf(\"upper = %#lx\\n\",upper); \n"
15533 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15534 #if RISCV64_DEBUG_CALL
15535 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15571 partInit.
code() = std::string(
"//fcvt.d.l\n")+
15572 "etiss_uint32 temp = 0;\n"
15573 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15574 #if RISCV64_Pipeline1
15575 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15576 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15577 "etiss_uint32 num_stages = 4;\n"
15578 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15579 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15581 #if RISCV64_Pipeline2
15582 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15583 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15584 "etiss_uint32 num_stages = 4;\n"
15585 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15586 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15589 "etiss_uint64 res = 0;\n"
15590 "etiss_int64 upper = 0;\n"
15592 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
15593 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15595 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15597 "res = fcvt_d((etiss_int64)cast_0, (etiss_uint32)2, (" +
toString(rm) +
" & 0xff));\n"
15598 #if RISCV64_DEBUG_CALL
15599 "printf(\"res = %#lx\\n\",res); \n"
15603 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15604 #if RISCV64_DEBUG_CALL
15605 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15612 #if RISCV64_DEBUG_CALL
15613 "printf(\"upper = %#lx\\n\",upper); \n"
15615 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15616 #if RISCV64_DEBUG_CALL
15617 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15653 partInit.
code() = std::string(
"//fcvt.d.lu\n")+
15654 "etiss_uint32 temp = 0;\n"
15655 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15656 #if RISCV64_Pipeline1
15657 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15658 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15659 "etiss_uint32 num_stages = 4;\n"
15660 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15661 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15663 #if RISCV64_Pipeline2
15664 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15665 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15666 "etiss_uint32 num_stages = 4;\n"
15667 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15668 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15671 "etiss_uint64 res = 0;\n"
15672 "etiss_int64 upper = 0;\n"
15674 "res = fcvt_d((etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"], (etiss_uint32)3, (" +
toString(rm) +
" & 0xff));\n"
15675 #if RISCV64_DEBUG_CALL
15676 "printf(\"res = %#lx\\n\",res); \n"
15680 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
15681 #if RISCV64_DEBUG_CALL
15682 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15689 #if RISCV64_DEBUG_CALL
15690 "printf(\"upper = %#lx\\n\",upper); \n"
15692 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | res);\n"
15693 #if RISCV64_DEBUG_CALL
15694 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15726 partInit.
code() = std::string(
"//fmv.d.x\n")+
15727 "etiss_uint32 temp = 0;\n"
15728 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15729 #if RISCV64_Pipeline1
15730 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15731 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15732 "etiss_uint32 num_stages = 4;\n"
15733 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15734 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15736 #if RISCV64_Pipeline2
15737 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15738 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15739 "etiss_uint32 num_stages = 4;\n"
15740 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15741 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15745 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = (etiss_uint64)*((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
15746 #if RISCV64_DEBUG_CALL
15747 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
15787 partInit.
code() = std::string(
"//c.addi4spn\n")+
15788 "etiss_uint32 exception = 0;\n"
15789 "etiss_uint32 temp = 0;\n"
15790 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15791 #if RISCV64_Pipeline1
15792 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15793 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15794 "etiss_uint32 num_stages = 4;\n"
15795 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15796 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15798 #if RISCV64_Pipeline2
15799 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15800 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15801 "etiss_uint32 num_stages = 4;\n"
15802 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15803 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15807 "if(" +
toString(imm) +
" == 0)\n"
15809 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
15812 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = *((RISCV64*)cpu)->X[2] + " +
toString(imm) +
";\n"
15813 #if RISCV64_DEBUG_CALL
15814 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
15819 "return exception;\n"
15849 partInit.
code() = std::string(
"//c.addi\n")+
15850 "etiss_uint32 temp = 0;\n"
15851 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15852 #if RISCV64_Pipeline1
15853 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15854 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15855 "etiss_uint32 num_stages = 4;\n"
15856 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15857 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15859 #if RISCV64_Pipeline2
15860 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15861 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15862 "etiss_uint32 num_stages = 4;\n"
15863 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15864 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15867 "etiss_int64 imm_extended = 0;\n"
15869 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
15871 "imm_extended = 0;\n"
15872 #if RISCV64_DEBUG_CALL
15873 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
15879 "imm_extended = 4294967295;\n"
15880 #if RISCV64_DEBUG_CALL
15881 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
15883 "imm_extended = (imm_extended << 32);\n"
15884 #if RISCV64_DEBUG_CALL
15885 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
15887 "imm_extended = imm_extended + 4294967232;\n"
15888 #if RISCV64_DEBUG_CALL
15889 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
15892 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
15893 #if RISCV64_DEBUG_CALL
15894 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
15896 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"]; \n"
15897 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
15899 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
15901 "*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = (etiss_int64)cast_0 + imm_extended;\n"
15902 #if RISCV64_DEBUG_CALL
15903 "printf(\"*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(rs1) +
"]); \n"
15924 partInit.
code() = std::string(
"//c.nop\n")+
15925 "etiss_uint32 temp = 0;\n"
15926 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15928 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15929 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15930 "etiss_uint32 num_stages = 4;\n"
15931 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15932 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15935 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15936 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15937 "etiss_uint32 num_stages = 4;\n"
15938 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15939 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15962 partInit.
code() = std::string(
"//dii\n")+
15963 "etiss_uint32 exception = 0;\n"
15964 "etiss_uint32 temp = 0;\n"
15965 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
15967 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15968 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15969 "etiss_uint32 num_stages = 4;\n"
15970 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15971 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15974 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
15975 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
15976 "etiss_uint32 num_stages = 4;\n"
15977 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
15978 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
15982 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
15986 "return exception;\n"
16008 shamt += shamt_5<<5;
16016 partInit.
code() = std::string(
"//c.slli\n")+
16017 "etiss_uint32 exception = 0;\n"
16018 "etiss_uint32 temp = 0;\n"
16019 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16020 #if RISCV64_Pipeline1
16021 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16022 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16023 "etiss_uint32 num_stages = 4;\n"
16024 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16025 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16027 #if RISCV64_Pipeline2
16028 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16029 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16030 "etiss_uint32 num_stages = 4;\n"
16031 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16032 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16036 "if(" +
toString(rs1) +
" == 0)\n"
16038 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16041 "*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] << " +
toString(shamt) +
");\n"
16042 #if RISCV64_DEBUG_CALL
16043 "printf(\"*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(rs1) +
"]); \n"
16048 "return exception;\n"
16085 partInit.
code() = std::string(
"//c.lw\n")+
16086 "etiss_uint32 exception = 0;\n"
16087 "etiss_uint32 temp = 0;\n"
16088 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16089 #if RISCV64_Pipeline1
16090 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16091 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16092 "etiss_uint32 num_stages = 4;\n"
16093 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16094 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16096 #if RISCV64_Pipeline2
16097 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16098 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16099 "etiss_uint32 num_stages = 4;\n"
16100 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16101 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16104 "etiss_uint64 offs = 0;\n"
16106 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
16107 #if RISCV64_DEBUG_CALL
16108 "printf(\"offs = %#lx\\n\",offs); \n"
16110 "etiss_uint32 MEM_offs;\n"
16111 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16112 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
16113 "etiss_int32 cast_0 = MEM_offs; \n"
16114 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
16116 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
16118 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
16119 #if RISCV64_DEBUG_CALL
16120 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
16125 "return exception;\n"
16154 partInit.
code() = std::string(
"//c.li\n")+
16155 "etiss_uint32 exception = 0;\n"
16156 "etiss_uint32 temp = 0;\n"
16157 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16158 #if RISCV64_Pipeline1
16159 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16160 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16161 "etiss_uint32 num_stages = 4;\n"
16162 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16163 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16165 #if RISCV64_Pipeline2
16166 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16167 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16168 "etiss_uint32 num_stages = 4;\n"
16169 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16170 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16173 "etiss_int64 imm_extended = 0;\n"
16175 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
16177 "imm_extended = 0;\n"
16178 #if RISCV64_DEBUG_CALL
16179 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16185 "imm_extended = 4294967295;\n"
16186 #if RISCV64_DEBUG_CALL
16187 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16189 "imm_extended = (imm_extended << 32);\n"
16190 #if RISCV64_DEBUG_CALL
16191 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16193 "imm_extended = imm_extended + 4294967232;\n"
16194 #if RISCV64_DEBUG_CALL
16195 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16198 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16199 #if RISCV64_DEBUG_CALL
16200 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16204 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16207 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = imm_extended;\n"
16208 #if RISCV64_DEBUG_CALL
16209 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
16214 "return exception;\n"
16247 partInit.
code() = std::string(
"//c.lwsp\n")+
16248 "etiss_uint32 exception = 0;\n"
16249 "etiss_uint32 temp = 0;\n"
16250 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16251 #if RISCV64_Pipeline1
16252 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16253 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16254 "etiss_uint32 num_stages = 4;\n"
16255 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16256 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16258 #if RISCV64_Pipeline2
16259 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16260 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16261 "etiss_uint32 num_stages = 4;\n"
16262 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16263 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16266 "etiss_uint64 offs = 0;\n"
16268 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
16269 #if RISCV64_DEBUG_CALL
16270 "printf(\"offs = %#lx\\n\",offs); \n"
16272 "etiss_uint32 MEM_offs;\n"
16273 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16274 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n"
16275 "etiss_int32 cast_0 = MEM_offs; \n"
16276 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
16278 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
16280 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
16281 #if RISCV64_DEBUG_CALL
16282 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
16287 "return exception;\n"
16324 partInit.
code() = std::string(
"//c.sw\n")+
16325 "etiss_uint32 exception = 0;\n"
16326 "etiss_uint32 temp = 0;\n"
16327 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16328 #if RISCV64_Pipeline1
16329 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16330 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16331 "etiss_uint32 num_stages = 4;\n"
16332 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16333 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16335 #if RISCV64_Pipeline2
16336 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16337 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16338 "etiss_uint32 num_stages = 4;\n"
16339 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16340 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16343 "etiss_uint64 offs = 0;\n"
16345 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
16346 #if RISCV64_DEBUG_CALL
16347 "printf(\"offs = %#lx\\n\",offs); \n"
16349 "etiss_uint32 MEM_offs;\n"
16350 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16351 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8];\n"
16352 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
16353 #if RISCV64_DEBUG_CALL
16354 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
16356 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
16358 "((RISCV64*)cpu)->RES = 0;\n"
16359 #if RISCV64_DEBUG_CALL
16360 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
16367 "return exception;\n"
16405 partInit.
code() = std::string(
"//c.beqz\n")+
16406 "etiss_uint32 temp = 0;\n"
16407 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16408 #if RISCV64_Pipeline1
16409 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16410 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16411 "etiss_uint32 num_stages = 4;\n"
16412 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16413 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16415 #if RISCV64_Pipeline2
16416 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16417 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16418 "etiss_uint32 num_stages = 4;\n"
16419 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16420 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16423 "etiss_int64 imm_extended = 0;\n"
16424 "etiss_int64 choose1 = 0;\n"
16426 "if((" +
toString(imm) +
" & 0x100)>>8 == 0)\n"
16428 "imm_extended = 0;\n"
16429 #if RISCV64_DEBUG_CALL
16430 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16436 "imm_extended = 4294967295;\n"
16437 #if RISCV64_DEBUG_CALL
16438 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16440 "imm_extended = (imm_extended << 32);\n"
16441 #if RISCV64_DEBUG_CALL
16442 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16444 "imm_extended = imm_extended + 4294966784;\n"
16445 #if RISCV64_DEBUG_CALL
16446 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16449 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16450 #if RISCV64_DEBUG_CALL
16451 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16453 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] == 0)\n"
16456 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
16458 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
16460 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
16461 #if RISCV64_DEBUG_CALL
16462 "printf(\"choose1 = %#lx\\n\",choose1); \n"
16471 #if RISCV64_DEBUG_CALL
16472 "printf(\"choose1 = %#lx\\n\",choose1); \n"
16475 "cpu->instructionPointer = choose1;\n"
16476 #if RISCV64_DEBUG_CALL
16477 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
16480 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
16512 partInit.
code() = std::string(
"//c.swsp\n")+
16513 "etiss_uint32 exception = 0;\n"
16514 "etiss_uint32 temp = 0;\n"
16515 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16516 #if RISCV64_Pipeline1
16517 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16518 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16519 "etiss_uint32 num_stages = 4;\n"
16520 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16521 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16523 #if RISCV64_Pipeline2
16524 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16525 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16526 "etiss_uint32 num_stages = 4;\n"
16527 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16528 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16531 "etiss_uint64 offs = 0;\n"
16533 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
16534 #if RISCV64_DEBUG_CALL
16535 "printf(\"offs = %#lx\\n\",offs); \n"
16537 "etiss_uint32 MEM_offs;\n"
16538 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16539 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
16540 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n"
16541 #if RISCV64_DEBUG_CALL
16542 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
16544 "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
16546 "((RISCV64*)cpu)->RES = 0;\n"
16547 #if RISCV64_DEBUG_CALL
16548 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
16555 "return exception;\n"
16585 partInit.
code() = std::string(
"//c.addiw\n")+
16586 "etiss_uint32 temp = 0;\n"
16587 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16588 #if RISCV64_Pipeline1
16589 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16590 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16591 "etiss_uint32 num_stages = 4;\n"
16592 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16593 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16595 #if RISCV64_Pipeline2
16596 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16597 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16598 "etiss_uint32 num_stages = 4;\n"
16599 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16600 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16603 "etiss_int64 imm_extended = 0;\n"
16604 "etiss_int32 res = 0;\n"
16606 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
16608 "imm_extended = 0;\n"
16609 #if RISCV64_DEBUG_CALL
16610 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16616 "imm_extended = 4294967295;\n"
16617 #if RISCV64_DEBUG_CALL
16618 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16620 "imm_extended = (imm_extended << 32);\n"
16621 #if RISCV64_DEBUG_CALL
16622 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16624 "imm_extended = imm_extended + 4294967232;\n"
16625 #if RISCV64_DEBUG_CALL
16626 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16629 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16630 #if RISCV64_DEBUG_CALL
16631 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16633 "if(" +
toString(rs1) +
" != 0)\n"
16635 "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] & 0xffffffff); \n"
16636 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
16638 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
16640 "res = (etiss_int32)cast_0 + imm_extended;\n"
16641 #if RISCV64_DEBUG_CALL
16642 "printf(\"res = %#x\\n\",res); \n"
16644 "etiss_int32 cast_1 = res; \n"
16645 "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n"
16647 "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n"
16649 "*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = (etiss_int64)cast_1;\n"
16650 #if RISCV64_DEBUG_CALL
16651 "printf(\"*((RISCV64*)cpu)->X[" +
toString(rs1) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(rs1) +
"]); \n"
16691 partInit.
code() = std::string(
"//c.fld\n")+
16692 "etiss_uint32 exception = 0;\n"
16693 "etiss_uint32 temp = 0;\n"
16694 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16695 #if RISCV64_Pipeline1
16696 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16697 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16698 "etiss_uint32 num_stages = 4;\n"
16699 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16700 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16702 #if RISCV64_Pipeline2
16703 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16704 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16705 "etiss_uint32 num_stages = 4;\n"
16706 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16707 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16710 "etiss_uint64 offs = 0;\n"
16711 "etiss_uint64 res = 0;\n"
16712 "etiss_int64 upper = 0;\n"
16714 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
16715 #if RISCV64_DEBUG_CALL
16716 "printf(\"offs = %#lx\\n\",offs); \n"
16718 "etiss_uint64 MEM_offs;\n"
16719 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16720 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
16721 "res = MEM_offs;\n"
16722 #if RISCV64_DEBUG_CALL
16723 "printf(\"res = %#lx\\n\",res); \n"
16727 "((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = res;\n"
16728 #if RISCV64_DEBUG_CALL
16729 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8]); \n"
16736 #if RISCV64_DEBUG_CALL
16737 "printf(\"upper = %#lx\\n\",upper); \n"
16739 "((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = ((upper << 64) | res);\n"
16740 #if RISCV64_DEBUG_CALL
16741 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
" + 8]); \n"
16747 "return exception;\n"
16780 partInit.
code() = std::string(
"//c.fldsp\n")+
16781 "etiss_uint32 exception = 0;\n"
16782 "etiss_uint32 temp = 0;\n"
16783 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16784 #if RISCV64_Pipeline1
16785 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16786 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16787 "etiss_uint32 num_stages = 4;\n"
16788 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16789 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16791 #if RISCV64_Pipeline2
16792 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16793 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16794 "etiss_uint32 num_stages = 4;\n"
16795 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16796 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16799 "etiss_uint64 offs = 0;\n"
16800 "etiss_uint64 res = 0;\n"
16801 "etiss_int64 upper = 0;\n"
16803 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
16804 #if RISCV64_DEBUG_CALL
16805 "printf(\"offs = %#lx\\n\",offs); \n"
16807 "etiss_uint64 MEM_offs;\n"
16808 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
16809 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
16810 "res = MEM_offs;\n"
16811 #if RISCV64_DEBUG_CALL
16812 "printf(\"res = %#lx\\n\",res); \n"
16816 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = res;\n"
16817 #if RISCV64_DEBUG_CALL
16818 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
16825 #if RISCV64_DEBUG_CALL
16826 "printf(\"upper = %#lx\\n\",upper); \n"
16828 "((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = ((upper << 64) | (etiss_uint64)res);\n"
16829 #if RISCV64_DEBUG_CALL
16830 "printf(\"((RISCV64*)cpu)->F[" +
toString(
rd) +
"] = %#lx\\n\",((RISCV64*)cpu)->F[" +
toString(
rd) +
"]); \n"
16836 "return exception;\n"
16865 partInit.
code() = std::string(
"//c.lui\n")+
16866 "etiss_uint32 exception = 0;\n"
16867 "etiss_uint32 temp = 0;\n"
16868 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16869 #if RISCV64_Pipeline1
16870 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16871 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16872 "etiss_uint32 num_stages = 4;\n"
16873 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16874 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16876 #if RISCV64_Pipeline2
16877 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16878 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16879 "etiss_uint32 num_stages = 4;\n"
16880 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16881 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16884 "etiss_int64 imm_extended = 0;\n"
16886 "if((" +
toString(imm) +
" & 0x20000)>>17 == 0)\n"
16888 "imm_extended = 0;\n"
16889 #if RISCV64_DEBUG_CALL
16890 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16896 "imm_extended = 4294967295;\n"
16897 #if RISCV64_DEBUG_CALL
16898 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16900 "imm_extended = (imm_extended << 32);\n"
16901 #if RISCV64_DEBUG_CALL
16902 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16904 "imm_extended = imm_extended + 4294705152;\n"
16905 #if RISCV64_DEBUG_CALL
16906 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16909 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
16910 #if RISCV64_DEBUG_CALL
16911 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
16915 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16918 "if(imm_extended == 0)\n"
16920 "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n"
16923 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = imm_extended;\n"
16924 #if RISCV64_DEBUG_CALL
16925 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
16930 "return exception;\n"
16965 partInit.
code() = std::string(
"//c.addi16sp\n")+
16966 "etiss_uint32 temp = 0;\n"
16967 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
16968 #if RISCV64_Pipeline1
16969 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16970 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16971 "etiss_uint32 num_stages = 4;\n"
16972 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16973 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16975 #if RISCV64_Pipeline2
16976 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
16977 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
16978 "etiss_uint32 num_stages = 4;\n"
16979 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
16980 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
16983 "etiss_int64 imm_extended = 0;\n"
16985 "if((" +
toString(imm) +
" & 0x200)>>9 == 0)\n"
16987 "imm_extended = 0;\n"
16988 #if RISCV64_DEBUG_CALL
16989 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16995 "imm_extended = 4294967295;\n"
16996 #if RISCV64_DEBUG_CALL
16997 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
16999 "imm_extended = (imm_extended << 32);\n"
17000 #if RISCV64_DEBUG_CALL
17001 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17003 "imm_extended = imm_extended + 4294966272;\n"
17004 #if RISCV64_DEBUG_CALL
17005 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17008 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
17009 #if RISCV64_DEBUG_CALL
17010 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17012 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[2]; \n"
17013 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17015 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17017 "*((RISCV64*)cpu)->X[2] = (etiss_int64)cast_0 + imm_extended;\n"
17018 #if RISCV64_DEBUG_CALL
17019 "printf(\"*((RISCV64*)cpu)->X[2] = %#lx\\n\",*((RISCV64*)cpu)->X[2]); \n"
17057 partInit.
code() = std::string(
"//c.ld\n")+
17058 "etiss_uint32 exception = 0;\n"
17059 "etiss_uint32 temp = 0;\n"
17060 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17061 #if RISCV64_Pipeline1
17062 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17063 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17064 "etiss_uint32 num_stages = 4;\n"
17065 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17066 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17068 #if RISCV64_Pipeline2
17069 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17070 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17071 "etiss_uint32 num_stages = 4;\n"
17072 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17073 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17076 "etiss_uint64 offs = 0;\n"
17078 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
17079 #if RISCV64_DEBUG_CALL
17080 "printf(\"offs = %#lx\\n\",offs); \n"
17082 "etiss_uint64 MEM_offs;\n"
17083 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
17084 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
17085 "etiss_int64 cast_0 = MEM_offs; \n"
17086 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17088 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17090 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
17091 #if RISCV64_DEBUG_CALL
17092 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
17097 "return exception;\n"
17130 partInit.
code() = std::string(
"//c.ldsp\n")+
17131 "etiss_uint32 exception = 0;\n"
17132 "etiss_uint32 temp = 0;\n"
17133 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17134 #if RISCV64_Pipeline1
17135 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17136 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17137 "etiss_uint32 num_stages = 4;\n"
17138 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17139 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17141 #if RISCV64_Pipeline2
17142 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17143 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17144 "etiss_uint32 num_stages = 4;\n"
17145 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17146 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17149 "etiss_uint64 offs = 0;\n"
17151 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
17152 #if RISCV64_DEBUG_CALL
17153 "printf(\"offs = %#lx\\n\",offs); \n"
17157 "etiss_uint64 MEM_offs;\n"
17158 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
17159 "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n"
17160 "etiss_int64 cast_0 = MEM_offs; \n"
17161 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17163 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17165 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = (etiss_int64)cast_0;\n"
17166 #if RISCV64_DEBUG_CALL
17167 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
17174 "return exception;\n"
17196 shamt += shamt_5<<5;
17204 partInit.
code() = std::string(
"//c.srli\n")+
17205 "etiss_uint32 temp = 0;\n"
17206 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17207 #if RISCV64_Pipeline1
17208 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17209 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17210 "etiss_uint32 num_stages = 4;\n"
17211 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17212 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17214 #if RISCV64_Pipeline2
17215 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17216 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17217 "etiss_uint32 num_stages = 4;\n"
17218 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17219 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17222 "etiss_int8 rs1_idx = 0;\n"
17224 "rs1_idx = " +
toString(rs1) +
" + 8;\n"
17225 #if RISCV64_DEBUG_CALL
17226 "printf(\"rs1_idx = %#x\\n\",rs1_idx); \n"
17228 "*((RISCV64*)cpu)->X[rs1_idx] = (*((RISCV64*)cpu)->X[rs1_idx] >> " +
toString(shamt) +
");\n"
17229 #if RISCV64_DEBUG_CALL
17230 "printf(\"*((RISCV64*)cpu)->X[rs1_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rs1_idx]); \n"
17256 shamt += shamt_5<<5;
17264 partInit.
code() = std::string(
"//c.srai\n")+
17265 "etiss_uint32 temp = 0;\n"
17266 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17267 #if RISCV64_Pipeline1
17268 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17269 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17270 "etiss_uint32 num_stages = 4;\n"
17271 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17272 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17274 #if RISCV64_Pipeline2
17275 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17276 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17277 "etiss_uint32 num_stages = 4;\n"
17278 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17279 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17282 "etiss_int8 rs1_idx = 0;\n"
17284 "rs1_idx = " +
toString(rs1) +
" + 8;\n"
17285 #if RISCV64_DEBUG_CALL
17286 "printf(\"rs1_idx = %#x\\n\",rs1_idx); \n"
17288 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n"
17289 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17291 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17293 "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 >> " +
toString(shamt) +
");\n"
17294 #if RISCV64_DEBUG_CALL
17295 "printf(\"*((RISCV64*)cpu)->X[rs1_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rs1_idx]); \n"
17329 partInit.
code() = std::string(
"//c.andi\n")+
17330 "etiss_uint32 temp = 0;\n"
17331 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17332 #if RISCV64_Pipeline1
17333 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17334 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17335 "etiss_uint32 num_stages = 4;\n"
17336 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17337 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17339 #if RISCV64_Pipeline2
17340 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17341 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17342 "etiss_uint32 num_stages = 4;\n"
17343 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17344 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17347 "etiss_int64 imm_extended = 0;\n"
17348 "etiss_int8 rs1_idx = 0;\n"
17350 "if((" +
toString(imm) +
" & 0x20)>>5 == 0)\n"
17352 "imm_extended = 0;\n"
17353 #if RISCV64_DEBUG_CALL
17354 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
17360 "imm_extended = 4294967295;\n"
17361 #if RISCV64_DEBUG_CALL
17362 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
17364 "imm_extended = (imm_extended << 32);\n"
17365 #if RISCV64_DEBUG_CALL
17366 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17368 "imm_extended = imm_extended + 4294967232;\n"
17369 #if RISCV64_DEBUG_CALL
17370 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17373 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
17374 #if RISCV64_DEBUG_CALL
17375 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
17377 "rs1_idx = " +
toString(rs1) +
" + 8;\n"
17378 #if RISCV64_DEBUG_CALL
17379 "printf(\"rs1_idx = %#x\\n\",rs1_idx); \n"
17381 "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n"
17382 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
17384 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
17386 "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 & imm_extended);\n"
17387 #if RISCV64_DEBUG_CALL
17388 "printf(\"*((RISCV64*)cpu)->X[rs1_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rs1_idx]); \n"
17420 partInit.
code() = std::string(
"//c.sub\n")+
17421 "etiss_uint32 temp = 0;\n"
17422 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17423 #if RISCV64_Pipeline1
17424 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17425 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17426 "etiss_uint32 num_stages = 4;\n"
17427 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17428 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17430 #if RISCV64_Pipeline2
17431 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17432 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17433 "etiss_uint32 num_stages = 4;\n"
17434 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17435 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17438 "etiss_int8 rd_idx = 0;\n"
17441 #if RISCV64_DEBUG_CALL
17442 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17444 "*((RISCV64*)cpu)->X[rd_idx] = *((RISCV64*)cpu)->X[rd_idx] - *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8];\n"
17445 #if RISCV64_DEBUG_CALL
17446 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17478 partInit.
code() = std::string(
"//c.xor\n")+
17479 "etiss_uint32 temp = 0;\n"
17480 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17481 #if RISCV64_Pipeline1
17482 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17483 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17484 "etiss_uint32 num_stages = 4;\n"
17485 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17486 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17488 #if RISCV64_Pipeline2
17489 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17490 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17491 "etiss_uint32 num_stages = 4;\n"
17492 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17493 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17496 "etiss_int8 rd_idx = 0;\n"
17499 #if RISCV64_DEBUG_CALL
17500 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17502 "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] ^ *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8]);\n"
17503 #if RISCV64_DEBUG_CALL
17504 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17536 partInit.
code() = std::string(
"//c.or\n")+
17537 "etiss_uint32 temp = 0;\n"
17538 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17539 #if RISCV64_Pipeline1
17540 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17541 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17542 "etiss_uint32 num_stages = 4;\n"
17543 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17544 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17546 #if RISCV64_Pipeline2
17547 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17548 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17549 "etiss_uint32 num_stages = 4;\n"
17550 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17551 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17554 "etiss_int8 rd_idx = 0;\n"
17557 #if RISCV64_DEBUG_CALL
17558 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17560 "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] | *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8]);\n"
17561 #if RISCV64_DEBUG_CALL
17562 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17594 partInit.
code() = std::string(
"//c.and\n")+
17595 "etiss_uint32 temp = 0;\n"
17596 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17597 #if RISCV64_Pipeline1
17598 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17599 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17600 "etiss_uint32 num_stages = 4;\n"
17601 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17602 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17604 #if RISCV64_Pipeline2
17605 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17606 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17607 "etiss_uint32 num_stages = 4;\n"
17608 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17609 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17612 "etiss_int8 rd_idx = 0;\n"
17615 #if RISCV64_DEBUG_CALL
17616 "printf(\"rd_idx = %#x\\n\",rd_idx); \n"
17618 "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] & *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8]);\n"
17619 #if RISCV64_DEBUG_CALL
17620 "printf(\"*((RISCV64*)cpu)->X[rd_idx] = %#lx\\n\",*((RISCV64*)cpu)->X[rd_idx]); \n"
17651 partInit.
code() = std::string(
"//c.mv\n")+
17652 "etiss_uint32 temp = 0;\n"
17653 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17654 #if RISCV64_Pipeline1
17655 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17656 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17657 "etiss_uint32 num_stages = 4;\n"
17658 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17659 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17661 #if RISCV64_Pipeline2
17662 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17663 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17664 "etiss_uint32 num_stages = 4;\n"
17665 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17666 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17670 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
17671 #if RISCV64_DEBUG_CALL
17672 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
17698 partInit.
code() = std::string(
"//c.jr\n")+
17699 "etiss_uint32 temp = 0;\n"
17700 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17701 #if RISCV64_Pipeline1
17702 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17703 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17704 "etiss_uint32 num_stages = 4;\n"
17705 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17706 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17708 #if RISCV64_Pipeline2
17709 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17710 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17711 "etiss_uint32 num_stages = 4;\n"
17712 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17713 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17717 "cpu->instructionPointer = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
17718 #if RISCV64_DEBUG_CALL
17719 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
17722 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
17752 partInit.
code() = std::string(
"//c.add\n")+
17753 "etiss_uint32 temp = 0;\n"
17754 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17755 #if RISCV64_Pipeline1
17756 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17757 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17758 "etiss_uint32 num_stages = 4;\n"
17759 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17760 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17762 #if RISCV64_Pipeline2
17763 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17764 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17765 "etiss_uint32 num_stages = 4;\n"
17766 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17767 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17771 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = *((RISCV64*)cpu)->X[" +
toString(
rd) +
"] + *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
17772 #if RISCV64_DEBUG_CALL
17773 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
"] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
"]); \n"
17800 partInit.
code() = std::string(
"//c.jalr\n")+
17801 "etiss_uint32 temp = 0;\n"
17802 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17803 #if RISCV64_Pipeline1
17804 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17805 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17806 "etiss_uint32 num_stages = 4;\n"
17807 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17808 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17810 #if RISCV64_Pipeline2
17811 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17812 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17813 "etiss_uint32 num_stages = 4;\n"
17814 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17815 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17820 #if RISCV64_DEBUG_CALL
17821 "printf(\"*((RISCV64*)cpu)->X[1] = %#lx\\n\",*((RISCV64*)cpu)->X[1]); \n"
17823 "cpu->instructionPointer = *((RISCV64*)cpu)->X[" +
toString(rs1) +
"];\n"
17824 #if RISCV64_DEBUG_CALL
17825 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
17828 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
17847 partInit.
code() = std::string(
"//c.ebreak\n")+
17848 "etiss_uint32 exception = 0;\n"
17849 "etiss_uint32 temp = 0;\n"
17850 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17852 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17853 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17854 "etiss_uint32 num_stages = 4;\n"
17855 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17856 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17859 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17860 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17861 "etiss_uint32 num_stages = 4;\n"
17862 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17863 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17867 "return ETISS_RETURNCODE_CPUFINISHED; \n"
17871 "return exception;\n"
17899 partInit.
code() = std::string(
"//c.subw\n")+
17900 "etiss_uint32 temp = 0;\n"
17901 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17902 #if RISCV64_Pipeline1
17903 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17904 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17905 "etiss_uint32 num_stages = 4;\n"
17906 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17907 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17909 #if RISCV64_Pipeline2
17910 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17911 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17912 "etiss_uint32 num_stages = 4;\n"
17913 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17914 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17917 "etiss_uint32 res = 0;\n"
17919 "res = (*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] & 0xffffffff) - (*((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8] & 0xffffffff);\n"
17920 #if RISCV64_DEBUG_CALL
17921 "printf(\"res = %#x\\n\",res); \n"
17923 "etiss_int32 cast_0 = res; \n"
17924 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
17926 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
17928 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
17929 #if RISCV64_DEBUG_CALL
17930 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
17962 partInit.
code() = std::string(
"//c.addw\n")+
17963 "etiss_uint32 temp = 0;\n"
17964 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
17965 #if RISCV64_Pipeline1
17966 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17967 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17968 "etiss_uint32 num_stages = 4;\n"
17969 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17970 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17972 #if RISCV64_Pipeline2
17973 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
17974 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
17975 "etiss_uint32 num_stages = 4;\n"
17976 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
17977 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
17980 "etiss_uint32 res = 0;\n"
17982 "res = (*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] & 0xffffffff) + (*((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8] & 0xffffffff);\n"
17983 #if RISCV64_DEBUG_CALL
17984 "printf(\"res = %#x\\n\",res); \n"
17986 "etiss_int32 cast_0 = res; \n"
17987 "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n"
17989 "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n"
17991 "*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = (etiss_int64)cast_0;\n"
17992 #if RISCV64_DEBUG_CALL
17993 "printf(\"*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8] = %#lx\\n\",*((RISCV64*)cpu)->X[" +
toString(
rd) +
" + 8]); \n"
18039 partInit.
code() = std::string(
"//c.j\n")+
18040 "etiss_uint32 temp = 0;\n"
18041 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18042 #if RISCV64_Pipeline1
18043 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18044 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18045 "etiss_uint32 num_stages = 4;\n"
18046 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18047 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18049 #if RISCV64_Pipeline2
18050 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18051 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18052 "etiss_uint32 num_stages = 4;\n"
18053 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18054 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18057 "etiss_int64 imm_extended = 0;\n"
18059 "if((" +
toString(imm) +
" & 0x800)>>11 == 0)\n"
18061 "imm_extended = 0;\n"
18062 #if RISCV64_DEBUG_CALL
18063 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18069 "imm_extended = 4294967295;\n"
18070 #if RISCV64_DEBUG_CALL
18071 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18073 "imm_extended = (imm_extended << 32);\n"
18074 #if RISCV64_DEBUG_CALL
18075 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18077 "imm_extended = imm_extended + 4294963200;\n"
18078 #if RISCV64_DEBUG_CALL
18079 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18082 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
18083 #if RISCV64_DEBUG_CALL
18084 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18087 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
18089 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
18091 "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n"
18092 #if RISCV64_DEBUG_CALL
18093 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
18096 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
18132 partInit.
code() = std::string(
"//c.fsd\n")+
18133 "etiss_uint32 exception = 0;\n"
18134 "etiss_uint32 temp = 0;\n"
18135 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18136 #if RISCV64_Pipeline1
18137 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18138 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18139 "etiss_uint32 num_stages = 4;\n"
18140 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18141 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18143 #if RISCV64_Pipeline2
18144 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18145 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18146 "etiss_uint32 num_stages = 4;\n"
18147 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18148 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18151 "etiss_uint64 offs = 0;\n"
18153 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
18154 #if RISCV64_DEBUG_CALL
18155 "printf(\"offs = %#lx\\n\",offs); \n"
18157 "etiss_uint64 MEM_offs;\n"
18158 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18159 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
" + 8] & 0xffffffffffffffff);\n"
18160 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18161 #if RISCV64_DEBUG_CALL
18162 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18164 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18166 "((RISCV64*)cpu)->RES = 0;\n"
18167 #if RISCV64_DEBUG_CALL
18168 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18175 "return exception;\n"
18205 partInit.
code() = std::string(
"//c.fsdsp\n")+
18206 "etiss_uint32 exception = 0;\n"
18207 "etiss_uint32 temp = 0;\n"
18208 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18209 #if RISCV64_Pipeline1
18210 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18211 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18212 "etiss_uint32 num_stages = 4;\n"
18213 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18214 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18216 #if RISCV64_Pipeline2
18217 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18218 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18219 "etiss_uint32 num_stages = 4;\n"
18220 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18221 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18224 "etiss_uint64 offs = 0;\n"
18226 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
18227 #if RISCV64_DEBUG_CALL
18228 "printf(\"offs = %#lx\\n\",offs); \n"
18230 "etiss_uint64 MEM_offs;\n"
18231 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18232 "MEM_offs = (((RISCV64*)cpu)->F[" +
toString(rs2) +
"] & 0xffffffffffffffff);\n"
18233 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18234 #if RISCV64_DEBUG_CALL
18235 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18237 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18239 "((RISCV64*)cpu)->RES = 0;\n"
18240 #if RISCV64_DEBUG_CALL
18241 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18248 "return exception;\n"
18286 partInit.
code() = std::string(
"//c.bnez\n")+
18287 "etiss_uint32 temp = 0;\n"
18288 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18289 #if RISCV64_Pipeline1
18290 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18291 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18292 "etiss_uint32 num_stages = 4;\n"
18293 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18294 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18296 #if RISCV64_Pipeline2
18297 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18298 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18299 "etiss_uint32 num_stages = 4;\n"
18300 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18301 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18304 "etiss_int64 imm_extended = 0;\n"
18305 "etiss_int64 choose1 = 0;\n"
18307 "if((" +
toString(imm) +
" & 0x100)>>8 == 0)\n"
18309 "imm_extended = 0;\n"
18310 #if RISCV64_DEBUG_CALL
18311 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18317 "imm_extended = 4294967295;\n"
18318 #if RISCV64_DEBUG_CALL
18319 "printf(\"imm_extended = %#x\\n\",imm_extended); \n"
18321 "imm_extended = (imm_extended << 32);\n"
18322 #if RISCV64_DEBUG_CALL
18323 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18325 "imm_extended = imm_extended + 4294966784;\n"
18326 #if RISCV64_DEBUG_CALL
18327 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18330 "imm_extended = imm_extended + " +
toString(imm) +
";\n"
18331 #if RISCV64_DEBUG_CALL
18332 "printf(\"imm_extended = %#lx\\n\",imm_extended); \n"
18334 "if(*((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] != 0)\n"
18337 "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n"
18339 "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n"
18341 "choose1 = (etiss_int64)cast_0 + imm_extended;\n"
18342 #if RISCV64_DEBUG_CALL
18343 "printf(\"choose1 = %#lx\\n\",choose1); \n"
18352 #if RISCV64_DEBUG_CALL
18353 "printf(\"choose1 = %#lx\\n\",choose1); \n"
18356 "cpu->instructionPointer = choose1;\n"
18357 #if RISCV64_DEBUG_CALL
18358 "printf(\"cpu->instructionPointer = %#lx\\n\",cpu->instructionPointer); \n"
18361 "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n"
18397 partInit.
code() = std::string(
"//c.sd\n")+
18398 "etiss_uint32 exception = 0;\n"
18399 "etiss_uint32 temp = 0;\n"
18400 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18401 #if RISCV64_Pipeline1
18402 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18403 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18404 "etiss_uint32 num_stages = 4;\n"
18405 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18406 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18408 #if RISCV64_Pipeline2
18409 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18410 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18411 "etiss_uint32 num_stages = 4;\n"
18412 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18413 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18416 "etiss_uint64 offs = 0;\n"
18418 "offs = *((RISCV64*)cpu)->X[" +
toString(rs1) +
" + 8] + " +
toString(uimm) +
";\n"
18419 #if RISCV64_DEBUG_CALL
18420 "printf(\"offs = %#lx\\n\",offs); \n"
18422 "etiss_uint64 MEM_offs;\n"
18423 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18424 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
" + 8];\n"
18425 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18426 #if RISCV64_DEBUG_CALL
18427 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18429 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18431 "((RISCV64*)cpu)->RES = 0;\n"
18432 #if RISCV64_DEBUG_CALL
18433 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18440 "return exception;\n"
18470 partInit.
code() = std::string(
"//c.sdsp\n")+
18471 "etiss_uint32 exception = 0;\n"
18472 "etiss_uint32 temp = 0;\n"
18473 "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n"
18474 #if RISCV64_Pipeline1
18475 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18476 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18477 "etiss_uint32 num_stages = 4;\n"
18478 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18479 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18481 #if RISCV64_Pipeline2
18482 "etiss_uint32 resource_time [100] = {1, 1, 1, 3, 1, 1, 1, 1, 4};\n"
18483 "etiss_uint32 resources [100][100] = {{0, 1}, {2}, {5}, {6, 7}};\n"
18484 "etiss_uint32 num_stages = 4;\n"
18485 "etiss_uint32 num_resources[100] = {2, 1, 1, 2};\n"
18486 "handleResources(resource_time, resources, num_stages, num_resources, cpu);\n"
18489 "etiss_uint64 offs = 0;\n"
18491 "offs = *((RISCV64*)cpu)->X[2] + " +
toString(uimm) +
";\n"
18492 #if RISCV64_DEBUG_CALL
18493 "printf(\"offs = %#lx\\n\",offs); \n"
18495 "etiss_uint64 MEM_offs;\n"
18496 "tmpbuf = (etiss_uint8 *)&MEM_offs;\n"
18497 "MEM_offs = *((RISCV64*)cpu)->X[" +
toString(rs2) +
"];\n"
18498 "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n"
18499 #if RISCV64_DEBUG_CALL
18500 "printf(\"MEM_offs = %#x\\n\",MEM_offs); \n"
18502 "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n"
18504 "((RISCV64*)cpu)->RES = 0;\n"
18505 #if RISCV64_DEBUG_CALL
18506 "printf(\"((RISCV64*)cpu)->RES = %#lx\\n\",((RISCV64*)cpu)->RES); \n"
18513 "return exception;\n"
static InstructionDefinition fmsub_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmsub.d",(uint32_t) 0x2000047,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmsub.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint32)1, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomin_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomin.d",(uint32_t) 0x8000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomin.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res1; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrw_rd_csr_rs1(ISA32_RISCV64, "csrrw",(uint32_t) 0x1073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_uint64 rs_val = 0;\n" "etiss_uint64 csr_val = 0;\n" "etiss_int64 writeMaskM = 0;\n" "rs_val = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "csr_val = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = rs_val;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = csr_val;\n" "}\n" "else\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | (rs_val & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = rs_val;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lwu_rd_imm_rs1_(ISA32_RISCV64, "lwu",(uint32_t) 0x6003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lwu\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)MEM_offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition subw_(ISA32_RISCV64, "subw",(uint32_t) 0x4000003b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//subw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) - (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_d_x_rd_rs1(ISA32_RISCV64, "fmv.d.x",(uint32_t) 0xf2000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.d.x\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fdiv_d_rd_frs1_frs2(ISA32_RISCV64, "fdiv.d",(uint32_t) 0x1a000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fdiv.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fdiv_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition flt_d_rd_frs1_frs2(ISA32_RISCV64, "flt.d",(uint32_t) 0xa2001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//flt.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)2);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sb_rs2_imm_rs1_(ISA32_RISCV64, "sb",(uint32_t) 0x23,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sb\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint8 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,1);\n" "if((offs + 1 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition lw_rd_imm_rs1_(ISA32_RISCV64, "lw",(uint32_t) 0x2003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_1 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition slt_rd_rs1_rs2(ISA32_RISCV64, "slt",(uint32_t) 0x2033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slt\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 choose1 = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
etiss::instr::InstructionGroup ISA32_RISCV64("ISA32_RISCV64", 32)
static InstructionDefinition fcvt_l_s_rd_frs1(ISA32_RISCV64, "fcvt.l.s",(uint32_t) 0xc0200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.l.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_uint32 flags = 0;\n" "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]), (etiss_uint32)0, ("+toString(rm)+" & 0xff));\n" "etiss_int64 cast_0 = res; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition divu_rd_rs1_rs2(ISA32_RISCV64, "divu",(uint32_t) 0x2005033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//divu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] / *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsqrt_d_rd_frs1(ISA32_RISCV64, "fsqrt.d",(uint32_t) 0x5a000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsqrt.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsqrt_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sc_w_rd_rs1_rs2(ISA32_RISCV64, "sc.w",(uint32_t) 0x1800202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sc.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if(offs == ((RISCV64*)cpu)->RES)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "else\n" "{\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 1;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fadd_d_rd_frs1_frs2(ISA32_RISCV64, "fadd.d",(uint32_t) 0x2000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fadd.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sd_rs2_imm_rs1_(ISA32_RISCV64, "sd",(uint32_t) 0x3023,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sltu_rd_rs1_rs2(ISA32_RISCV64, "sltu",(uint32_t) 0x3033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sltu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 choose1 = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] < (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
RegisterSet & getAffectedRegisters()
static InstructionDefinition add_rd_rs1_rs2(ISA32_RISCV64, "add",(uint32_t) 0x33,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//add\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"] + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition srai_rd_rs1_shamt(ISA32_RISCV64, "srai",(uint32_t) 0x40005013,(uint32_t) 0xfc00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(25, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srai\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 >> "+toString(shamt)+");\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition slliw_rd_rs1_shamt(ISA32_RISCV64, "slliw",(uint32_t) 0x101b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(24, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slliw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) << "+toString(shamt)+");\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addi_rs1_imm(ISA16_RISCV64, "c.addi",(uint16_t) 0x1,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rs1)+"] = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition div_rd_rs1_rs2(ISA32_RISCV64, "div",(uint32_t) 0x2004033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//div\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 XLM1 = 0;\n" "etiss_int64 MMIN = 0;\n" "etiss_int64 M1 = 0;\n" "etiss_int64 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "XLM1 = 64 - 1;\n" "ONE = 1;\n" "MMIN = (ONE << XLM1);\n" "if((*((RISCV64*)cpu)->X["+toString(rs1)+"] == MMIN) && (*((RISCV64*)cpu)->X["+toString(rs2)+"] == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = MMIN;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_1 / (etiss_int64)cast_0);\n" "}\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
#define RISCV64_Pipeline2
const MM_EXPORT int32_t NOERROR
static InstructionDefinition c_addiw_rs1_imm(ISA16_RISCV64, "c.addiw",(uint16_t) 0x2001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addiw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int32 res = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rs1)+" != 0)\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int32)cast_0 + imm_extended;\n" "etiss_int32 cast_1 = res; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rs1)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition ecall_(ISA32_RISCV64, "ecall",(uint32_t) 0x73,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ecall\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "exception = ETISS_RETURNCODE_SYSCALL; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addi16sp_imm(ISA16_RISCV64, "c.addi16sp",(uint16_t) 0x6101,(uint16_t) 0xef83, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_int64 imm=0;static BitArrayRange R_imm_9(12, 12);etiss_int64 imm_9=R_imm_9.read(ba);imm+=imm_9<< 9;static BitArrayRange R_imm_4(6, 6);etiss_int64 imm_4=R_imm_4.read(ba);imm+=imm_4<< 4;static BitArrayRange R_imm_6(5, 5);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_7(4, 3);etiss_int64 imm_7=R_imm_7.read(ba);imm+=imm_7<< 7;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addi16sp\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x200)>>9 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294966272;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[2]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X[2] = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_s_rd_frs1(ISA32_RISCV64, "fcvt.d.s",(uint32_t) 0x42000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fconv_f2d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffff), ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition mret_(ISA32_RISCV64, "mret",(uint32_t) 0x30200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mret\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[768] & 0x1800)>>11;\n" "((RISCV64*)cpu)->CSR[768] ^= (((RISCV64*)cpu)->CSR[768] & 0x1800);\n" "((RISCV64*)cpu)->CSR[768] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[768] & 0x80)>>4)) ^ (((RISCV64*)cpu)->CSR[768] & 0x8);\n" "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[833];\n" "((RISCV64*)cpu)->CSR[0]= ((RISCV64*)cpu)->CSR[768];\n" "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[768];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_ldsp_rd_uimm_sp_(ISA16_RISCV64, "c.ldsp",(uint16_t) 0x6002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 uimm=0;static BitArrayRange R_uimm_5(12, 12);etiss_uint64 uimm_5=R_uimm_5.read(ba);uimm+=uimm_5<< 5;static BitArrayRange R_uimm_3(6, 5);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(4, 2);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.ldsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
endif() endforeach() unset(LOCAL_SOURCE1) unset(LOCAL_SOURCE2) set(ETISS_HEADER $
static InstructionDefinition slti_rd_rs1_imm(ISA32_RISCV64, "slti",(uint32_t) 0x2013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slti\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int8 choose1 = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = imm_extended; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition xori_rd_rs1_imm(ISA32_RISCV64, "xori",(uint32_t) 0x4013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//xori\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 ^ imm_extended);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition bne_rs1_rs2_imm(ISA32_RISCV64, "bne",(uint32_t) 0x1063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bne\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] != *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_lu_rd_xrs1(ISA32_RISCV64, "fcvt.s.lu",(uint32_t) 0xd0300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.lu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_64_32(*((RISCV64*)cpu)->X["+toString(rs1)+"], (etiss_uint32)3);\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fnmsub_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmsub.s",(uint32_t) 0x4b,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmsub.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)3, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)3, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addw_8_rd_8_rd_8_rs2(ISA16_RISCV64, "c.addw",(uint16_t) 0x9c21,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "res = (*((RISCV64*)cpu)->X["+toString(rd)+" + 8] & 0xffffffff) + (*((RISCV64*)cpu)->X["+toString(rs2)+" + 8] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
this class contains parameters that persist in between instruction lookpus/translation within a trans...
static InstructionDefinition lr_w_rd_rs1(ISA32_RISCV64, "lr.w",(uint32_t) 0x1000202f,(uint32_t) 0xf9f0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lr.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "((RISCV64*)cpu)->RES = offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoxor_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoxor.d",(uint32_t) 0x2000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoxor.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = (res ^ *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
static InstructionDefinition xor_rd_rs1_rs2(ISA32_RISCV64, "xor",(uint32_t) 0x4033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//xor\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] ^ *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrwi_rd_csr_zimm(ISA32_RISCV64, "csrrwi",(uint32_t) 0x5073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;etiss_uint64 zimm=0;static BitArrayRange R_zimm_0(19, 15);etiss_uint64 zimm_0=R_zimm_0.read(ba);zimm+=zimm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrwi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_int64 writeMaskM = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "}\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((etiss_uint64)"+toString(zimm)+" & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (etiss_uint64)"+toString(zimm)+";\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_li_rd_imm(ISA16_RISCV64, "c.li",(uint16_t) 0x4001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.li\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition mulhu_rd_rs1_rs2(ISA32_RISCV64, "mulhu",(uint32_t) 0x2003033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulhu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = ((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] * (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)(res >> 64);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_wu_d_rd_frs1(ISA32_RISCV64, "fcvt.wu.d",(uint32_t) 0xc2100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.wu.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
void deleteTimer(etiss::Plugin *timer)
delete timer instance
static InstructionDefinition c_beqz_8_rs1_imm(ISA16_RISCV64, "c.beqz",(uint16_t) 0xc001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_8(12, 12);etiss_int64 imm_8=R_imm_8.read(ba);imm+=imm_8<< 8;static BitArrayRange R_imm_3(11, 10);etiss_int64 imm_3=R_imm_3.read(ba);imm+=imm_3<< 3;static BitArrayRange R_imm_6(6, 5);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_1(4, 3);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.beqz\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x100)>>8 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294966784;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+" + 8] == 0)\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 2;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sw_8_rs2_uimm_8_rs1_(ISA16_RISCV64, "c.sw",(uint16_t) 0xc000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_2(6, 6);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(5, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+" + 8];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition jal_rd_imm(ISA32_RISCV64, "jal",(uint32_t) 0x6f,(uint32_t) 0x7f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_20(31, 31);etiss_int64 imm_20=R_imm_20.read(ba);imm+=imm_20<< 20;static BitArrayRange R_imm_1(30, 21);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(20, 20);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;static BitArrayRange R_imm_12(19, 12);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//jal\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x100000)>>20 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4292870144;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "else\n" "{\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition and_rd_rs1_rs2(ISA32_RISCV64, "and",(uint32_t) 0x7033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//and\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
std::set< std::string > listenerSupportedRegisters_
static InstructionDefinition fsgnj_s_rd_frs1_frs2(ISA32_RISCV64, "fsgnj.s",(uint32_t) 0x20000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnj.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((((RISCV64*)cpu)->F["+toString(rs1)+"] & 2147483647) | (((RISCV64*)cpu)->F["+toString(rs2)+"] & -2147483648));\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = ((frs1 & 2147483647) | (frs2 & -2147483648));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_or_8_rd_8_rs2(ISA16_RISCV64, "c.or",(uint16_t) 0x8c41,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.or\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] | *((RISCV64*)cpu)->X["+toString(rs2)+" + 8]);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_ebreak_(ISA16_RISCV64, "c.ebreak",(uint16_t) 0x9002,(uint16_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.ebreak\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "return ETISS_RETURNCODE_CPUFINISHED; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition srliw_rd_rs1_shamt(ISA32_RISCV64, "srliw",(uint32_t) 0x501b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(24, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srliw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) >> "+toString(shamt)+");\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_bnez_8_rs1_imm(ISA16_RISCV64, "c.bnez",(uint16_t) 0xe001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_8(12, 12);etiss_int64 imm_8=R_imm_8.read(ba);imm+=imm_8<< 8;static BitArrayRange R_imm_3(11, 10);etiss_int64 imm_3=R_imm_3.read(ba);imm+=imm_3<< 3;static BitArrayRange R_imm_6(6, 5);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_1(4, 3);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.bnez\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x100)>>8 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294966784;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+" + 8] != 0)\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 2;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_lwsp_rd_sp_uimm(ISA16_RISCV64, "c.lwsp",(uint16_t) 0x4002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 uimm=0;static BitArrayRange R_uimm_5(12, 12);etiss_uint64 uimm_5=R_uimm_5.read(ba);uimm+=uimm_5<< 5;static BitArrayRange R_uimm_2(6, 4);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(3, 2);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.lwsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
provides to architecture dependent registers as defined by gdb
static InstructionDefinition fsgnjx_s_rd_frs1_frs2(ISA32_RISCV64, "fsgnjx.s",(uint32_t) 0x20002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjx.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = (((RISCV64*)cpu)->F["+toString(rs1)+"] ^ (((RISCV64*)cpu)->F["+toString(rs2)+"] & -2147483648));\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = (frs1 ^ (frs2 & -2147483648));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
virtual ETISS_CPU * newCPU()
allocate new cpu structure
static InstructionDefinition auipc_rd_imm(ISA32_RISCV64, "auipc",(uint32_t) 0x17,(uint32_t) 0x7f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 12);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//auipc\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x80000000)>>31 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0 + imm_extended;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_l_rd_xrs1(ISA32_RISCV64, "fcvt.s.l",(uint32_t) 0xd0200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.l\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_64_32(*((RISCV64*)cpu)->X["+toString(rs1)+"], (etiss_uint32)2);\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_l_d_rd_frs1(ISA32_RISCV64, "fcvt.l.d",(uint32_t) 0xc2200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.l.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_lw_8_rd_uimm_8_rs1_(ISA16_RISCV64, "c.lw",(uint16_t) 0x4000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_2(6, 6);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(5, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.lw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition remuw_rd_rs1_rs2(ISA32_RISCV64, "remuw",(uint32_t) 0x200703b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//remuw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) != 0)\n" "{\n" "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) % (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sc_d_rd_rs1_rs2(ISA32_RISCV64, "sc.d",(uint32_t) 0x1800302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sc.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if(offs == ((RISCV64*)cpu)->RES)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "else\n" "{\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 1;\n" "}\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fmul_s_rd_frs1_frs2(ISA32_RISCV64, "fmul.s",(uint32_t) 0x10000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmul.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmul_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmul_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_mv_rd_rs2(ISA16_RISCV64, "c.mv",(uint16_t) 0x8002,(uint16_t) 0xf003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.mv\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sllw_rd_rs1_rs2(ISA32_RISCV64, "sllw",(uint32_t) 0x103b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sllw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "etiss_uint32 count = 0;\n" "etiss_int32 mask = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "mask = 31;\n" "count = ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) & mask);\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) << count);\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition remu_rd_rs1_rs2(ISA32_RISCV64, "remu",(uint32_t) 0x2007033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//remu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] % *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
basic cpu state structure needed for execution of any cpu architecture.
static InstructionDefinition amoadd_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoadd.d",(uint32_t) 0x302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoadd.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = res + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fnmadd_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmadd.s",(uint32_t) 0x4f,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmadd.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)2, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
uint64_t current_address_
start address of current instruction
static InstructionDefinition fnmadd_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmadd.d",(uint32_t) 0x200004f,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmadd.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint32)2, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
Contains a small code snipped.
static BitArrayRange rd(25, 21)
static InstructionDefinition jalr_rd_rs1_imm(ISA32_RISCV64, "jalr",(uint32_t) 0x67,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//jalr\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 new_pc = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "new_pc = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "else\n" "{\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "cpu->instructionPointer = (new_pc & ~1)&0xffffffffffffffff;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sraiw_rd_rs1_shamt(ISA32_RISCV64, "sraiw",(uint32_t) 0x4000501b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(24, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sraiw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 sh_val = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "sh_val = ((etiss_int32)cast_0 >> "+toString(shamt)+");\n" "etiss_int32 cast_1 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_w_s_rd_frs1(ISA32_RISCV64, "fcvt.w.s",(uint32_t) 0xc0000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.w.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "if(64 == 32)\n" "{\n" "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F["+toString(rs1)+"], (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_wu_s_rd_frs1(ISA32_RISCV64, "fcvt.wu.s",(uint32_t) 0xc0100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.wu.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "if(64 == 32)\n" "{\n" "etiss_int32 cast_0 = fcvt_s(((RISCV64*)cpu)->F["+toString(rs1)+"], (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "etiss_int32 cast_1 = fcvt_s(frs1, (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
etiss_uint64 resourceUsages[ETISS_MAX_RESOURCES]
how many cycles each resource is used
static InstructionDefinition fsqrt_s_rd_frs1(ISA32_RISCV64, "fsqrt.s",(uint32_t) 0x58000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsqrt.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsqrt_s(((RISCV64*)cpu)->F["+toString(rs1)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsqrt_s(frs1, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
virtual void deleteCPU(ETISS_CPU *)
delete cpu structure
static InstructionDefinition fence_i_(ISA32_RISCV64, "fence_i",(uint32_t) 0x100f,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_uint64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fence_i\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->FENCE[1] = "+toString(imm)+";\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fclass_d_rd_frs1(ISA32_RISCV64, "fclass.d",(uint32_t) 0xe2001053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fclass.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = fclass_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff));\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
etiss_uint32 mode
instruction set mode of the processor
static InstructionDefinition lui_rd_imm(ISA32_RISCV64, "lui",(uint32_t) 0x37,(uint32_t) 0x7f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 12);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lui\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x80000000)>>31 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = imm_extended;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomaxu_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomaxu.d",(uint32_t) 0xe000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomaxu.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "if(res1 < *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
Acts as a view/filter to a BitArray.
static InstructionDefinition srl_rd_rs1_rs2(ISA32_RISCV64, "srl",(uint32_t) 0x5033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srl\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] >> (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 64 - 1));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amominu_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amominu.w",(uint32_t) 0xc000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amominu.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "if(res1 > *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_srai_8_rs1_shamt(ISA16_RISCV64, "c.srai",(uint16_t) 0x8401,(uint16_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_5(12, 12);etiss_uint64 shamt_5=R_shamt_5.read(ba);shamt+=shamt_5<< 5;static BitArrayRange R_shamt_0(6, 2);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.srai\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rs1_idx = 0;\n" "rs1_idx = "+toString(rs1)+" + 8;\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 >> "+toString(shamt)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
virtual etiss::plugin::gdb::GDBCore & getGDBCore()
get the GDBcore for RISCV64 architecture
static InstructionDefinition c_fsdsp_rs2_uimm_x2_(ISA16_RISCV64, "c.fsdsp",(uint16_t) 0xa002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(9, 7);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fsdsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sfence_vma_(ISA32_RISCV64, "sfence.vma",(uint32_t) 0x12000073,(uint32_t) 0xfe007fff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[3], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sfence.vma\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->FENCE[2] = "+toString(rs1)+";\n" "((RISCV64*)cpu)->FENCE[3] = "+toString(rs2)+";\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition divw_rd_rs1_rs2(ISA32_RISCV64, "divw",(uint32_t) 0x200403b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//divw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 MMIN = 0;\n" "etiss_int32 M1 = 0;\n" "etiss_int32 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "ONE = 1;\n" "MMIN = (ONE << 31);\n" "if(((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) == MMIN) && ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ( - 1 << 31);\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = ((etiss_int64)cast_1 / (etiss_int64)cast_0); \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_2;\n" "}\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmsub_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmsub.s",(uint32_t) 0x47,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmsub.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)1, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)1, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_l_rd_rs1(ISA32_RISCV64, "fcvt.d.l",(uint32_t) 0xd2200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.l\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = fcvt_d((etiss_int64)cast_0, (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_swsp_rs2_uimm_sp_(ISA16_RISCV64, "c.swsp",(uint16_t) 0xc002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_2(12, 9);etiss_uint64 uimm_2=R_uimm_2.read(ba);uimm+=uimm_2<< 2;static BitArrayRange R_uimm_6(8, 7);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.swsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 instructionPointer
pointer to next instruction.
static InstructionDefinition addi_rd_rs1_imm(ISA32_RISCV64, "addi",(uint32_t) 0x13,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//addi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0 + imm_extended;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sub_rd_rs1_rs2(ISA32_RISCV64, "sub",(uint32_t) 0x40000033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sub\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"] - *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition srlw_rd_rs1_rs2(ISA32_RISCV64, "srlw",(uint32_t) 0x503b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srlw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "etiss_uint32 count = 0;\n" "etiss_int32 mask = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "mask = 31;\n" "count = ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) & mask);\n" "sh_val = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) >> count);\n" "etiss_int32 cast_0 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_lu_rd_rs1(ISA32_RISCV64, "fcvt.d.lu",(uint32_t) 0xd2300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.lu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_d((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"], (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
int32_t tlb_overlap_handler(int32_t fault, MMU *mmu, uint64_t vma, MM_ACCESS access)
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
static InstructionDefinition fmax_s_rd_frs1_frs2(ISA32_RISCV64, "fmax.s",(uint32_t) 0x28001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmax.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsel_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = fsel_s(frs1, frs2, (etiss_uint32)1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
the interface to translate instructions of and processor architecture
static const char *const reg_name[]
static InstructionDefinition fcvt_s_w_rd_rs1(ISA32_RISCV64, "fcvt.s.w",(uint32_t) 0xd0000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.w\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "}\n" "else\n" "{\n" "res = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomaxu_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomaxu.w",(uint32_t) 0xe000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomaxu.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "if(res1 < *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrci_rd_csr_zimm(ISA32_RISCV64, "csrrci",(uint32_t) 0x7073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;etiss_uint64 zimm=0;static BitArrayRange R_zimm_0(19, 15);etiss_uint64 zimm_0=R_zimm_0.read(ba);zimm+=zimm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrci\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_int64 writeMaskM = 0;\n" "res = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "if("+toString(zimm)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res & ~(etiss_uint64)"+toString(zimm)+") & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (res & ~(etiss_uint64)"+toString(zimm)+")&0xffffffffffffffff;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrsi_rd_csr_zimm(ISA32_RISCV64, "csrrsi",(uint32_t) 0x6073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;etiss_uint64 zimm=0;static BitArrayRange R_zimm_0(19, 15);etiss_uint64 zimm_0=R_zimm_0.read(ba);zimm+=zimm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrsi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_int64 writeMaskM = 0;\n" "res = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "if("+toString(zimm)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((res | (etiss_uint64)"+toString(zimm)+") & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (res | (etiss_uint64)"+toString(zimm)+");\n" "}\n" "}\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_jalr_rs1(ISA16_RISCV64, "c.jalr",(uint16_t) 0x9002,(uint16_t) 0xf07f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.jalr\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X[1] = "+toString((uint64_t) ic.current_address_)+"ULL + 2;\n" "cpu->instructionPointer = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition addiw_rd_rs1_imm(ISA32_RISCV64, "addiw",(uint32_t) 0x1b,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//addiw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int32 res = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int32)cast_0 + imm_extended;\n" "etiss_int32 cast_1 = res; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sll_rd_rs1_rs2(ISA32_RISCV64, "sll",(uint32_t) 0x1033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sll\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] << (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 64 - 1));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amoor_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoor.w",(uint32_t) 0x4000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoor.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = (res1 | *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sltiu_rd_rs1_imm(ISA32_RISCV64, "sltiu",(uint32_t) 0x3013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sltiu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 full_imm = 0;\n" "etiss_int8 choose1 = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = imm_extended; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "full_imm = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] < (etiss_uint64)full_imm)\n" "{\n" "choose1 = 1;\n" "}\n" "else\n" "{\n" "choose1 = 0;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = choose1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sub_8_rd_8_rs2(ISA16_RISCV64, "c.sub",(uint16_t) 0x8c01,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sub\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = *((RISCV64*)cpu)->X[rd_idx] - *((RISCV64*)cpu)->X["+toString(rs2)+" + 8];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_w_x_rd_rs1(ISA32_RISCV64, "fmv.w.x",(uint32_t) 0xf0000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.w.x\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 upper = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff);\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)(*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amominu_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amominu.d",(uint32_t) 0xc000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amominu.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "if(res > *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
#define RISCV64_Pipeline1
virtual unsigned getInstructionSizeInBytes()
virtual const std::set< std::string > & getListenerSupportedRegisters()
static InstructionDefinition fadd_s_rd_frs1_frs2(ISA32_RISCV64, "fadd.s",(uint32_t) 0x53,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fadd.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fadd_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition feq_d_rd_frs1_frs2(ISA32_RISCV64, "feq.d",(uint32_t) 0xa2002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//feq.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)0);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmin_s_rd_frs1_frs2(ISA32_RISCV64, "fmin.s",(uint32_t) 0x28000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmin.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsel_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)0);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = fsel_s(frs1, frs2, (etiss_uint32)0);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fdiv_s_rd_frs1_frs2(ISA32_RISCV64, "fdiv.s",(uint32_t) 0x18000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fdiv.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fdiv_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fdiv_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition slli_rd_rs1_shamt(ISA32_RISCV64, "slli",(uint32_t) 0x1013,(uint32_t) 0xfc00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(25, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//slli\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] << "+toString(shamt)+");\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_w_rd_rs1(ISA32_RISCV64, "fcvt.d.w",(uint32_t) 0xd2000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.w\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = fcvt_32_64((etiss_int64)cast_0, (etiss_uint32)2, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_d_wu_rd_rs1(ISA32_RISCV64, "fcvt.d.wu",(uint32_t) 0xd2100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.d.wu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fcvt_32_64((etiss_uint64)(*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmadd_s_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmadd.s",(uint32_t) 0x43,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmadd.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "etiss_uint32 frs3 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fmadd_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], ((RISCV64*)cpu)->F["+toString(rs3)+"], (etiss_uint32)0, choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "frs3 = unbox_s(((RISCV64*)cpu)->F["+toString(rs3)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_s(frs1, frs2, frs3, (etiss_uint32)0, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amoor_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoor.d",(uint32_t) 0x4000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoor.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = (res | *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition mul_rd_rs1_rs2(ISA32_RISCV64, "mul",(uint32_t) 0x2000033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mul\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = ((etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs1)+"] * (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)res;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition uret_(ISA32_RISCV64, "uret",(uint32_t) 0x200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//uret\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->CSR[3088] = 0;\n" "((RISCV64*)cpu)->CSR[0] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[0] & 0x10)>>4)) ^ (((RISCV64*)cpu)->CSR[0] & 0x1);\n" "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[65];\n" "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[0];\n" "((RISCV64*)cpu)->CSR[256]=((RISCV64*)cpu)->CSR[0];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fence_(ISA32_RISCV64, "fence",(uint32_t) 0xf,(uint32_t) 0xf000707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 succ=0;static BitArrayRange R_succ_0(23, 20);etiss_uint64 succ_0=R_succ_0.read(ba);succ+=succ_0;etiss_uint64 pred=0;static BitArrayRange R_pred_0(27, 24);etiss_uint64 pred_0=R_pred_0.read(ba);pred+=pred_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[0], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fence\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->FENCE[0] = (("+toString(pred)+" << 4) | "+toString(succ)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_add_rd_rs2(ISA16_RISCV64, "c.add",(uint16_t) 0x9002,(uint16_t) 0xf003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rd], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.add\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rd)+"] + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsgnjn_d_rd_frs1_frs2(ISA32_RISCV64, "fsgnjn.d",(uint32_t) 0x22001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjn.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 ONE = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 MSK1 = 0;\n" "etiss_int64 MSK2 = 0;\n" "ONE = 1;\n" "MSK1 = (ONE << 63);\n" "MSK2 = MSK1 - 1;\n" "res = (((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff) & MSK2) | (~(((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff) & MSK1))&0xffffffffffffffff;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fnmsub_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fnmsub.d",(uint32_t) 0x200004b,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fnmsub.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint32)3, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition rem_rd_rs1_rs2(ISA32_RISCV64, "rem",(uint32_t) 0x2006033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//rem\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 XLM1 = 0;\n" "etiss_int64 MMIN = 0;\n" "etiss_int64 M1 = 0;\n" "etiss_int64 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "XLM1 = 64 - 1;\n" "ONE = 1;\n" "MMIN = (ONE << XLM1);\n" "if((*((RISCV64*)cpu)->X["+toString(rs1)+"] == MMIN) && (*((RISCV64*)cpu)->X["+toString(rs2)+"] == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_1 % (etiss_int64)cast_0);\n" "}\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_xor_8_rd_8_rs2(ISA16_RISCV64, "c.xor",(uint16_t) 0x8c21,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.xor\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] ^ *((RISCV64*)cpu)->X["+toString(rs2)+" + 8]);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
RegisterSet & getRegisterDependencies()
static InstructionDefinition addw_(ISA32_RISCV64, "addw",(uint32_t) 0x3b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//addw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "res = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) + (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_x_w_rd_frs1(ISA32_RISCV64, "fmv.x.w",(uint32_t) 0xe0000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.x.w\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 cast_0 = (((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sdsp_rs2_uimm_sp_(ISA16_RISCV64, "c.sdsp",(uint16_t) 0xe002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(6, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(9, 7);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sdsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition ori_rd_rs1_imm(ISA32_RISCV64, "ori",(uint32_t) 0x6013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ori\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 | imm_extended);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fle_s_rd_frs1_frs2(ISA32_RISCV64, "fle.s",(uint32_t) 0xa0000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fle.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)1);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition flw_rd_imm_xrs1_(ISA32_RISCV64, "flw",(uint32_t) 0x2007,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//flw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "res = MEM_offs;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoand_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoand.w",(uint32_t) 0x6000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoand.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = (res1 & *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition remw_rd_rs1_rs2(ISA32_RISCV64, "remw",(uint32_t) 0x200603b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//remw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int32 MMIN = 0;\n" "etiss_int32 M1 = 0;\n" "etiss_int32 ONE = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if(*((RISCV64*)cpu)->X["+toString(rs2)+"] != 0)\n" "{\n" "M1 = - 1;\n" "ONE = 1;\n" "MMIN = (ONE << 31);\n" "if(((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) == MMIN) && (*((RISCV64*)cpu)->X["+toString(rs2)+"] == M1))\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = 0;\n" "}\n" "else\n" "{\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = ((etiss_int64)cast_1 % (etiss_int64)cast_0); \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_2;\n" "}\n" "}\n" "else\n" "{\n" "etiss_int64 cast_3 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_3 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_3 =0x0 + (etiss_uint64)cast_3 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_3;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
std::string toString(const T &val)
conversion of type T to std::string.
static InstructionDefinition c_j_imm(ISA16_RISCV64, "c.j",(uint16_t) 0xa001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_int64 imm=0;static BitArrayRange R_imm_11(12, 12);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;static BitArrayRange R_imm_4(11, 11);etiss_int64 imm_4=R_imm_4.read(ba);imm+=imm_4<< 4;static BitArrayRange R_imm_8(10, 9);etiss_int64 imm_8=R_imm_8.read(ba);imm+=imm_8<< 8;static BitArrayRange R_imm_10(8, 8);etiss_int64 imm_10=R_imm_10.read(ba);imm+=imm_10<< 10;static BitArrayRange R_imm_6(7, 7);etiss_int64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_7(6, 6);etiss_int64 imm_7=R_imm_7.read(ba);imm+=imm_7<< 7;static BitArrayRange R_imm_1(5, 3);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_5(2, 2);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.j\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "cpu->instructionPointer = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
std::set< std::string > & fileglobalCode()
static InstructionDefinition amomax_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomax.d",(uint32_t) 0xa000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomax.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoadd_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoadd.w",(uint32_t) 0x202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoadd.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = res1 + *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_andi_8_rs1_imm(ISA16_RISCV64, "c.andi",(uint16_t) 0x8801,(uint16_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(12, 12);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(6, 2);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.andi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int8 rs1_idx = 0;\n" "if(("+toString(imm)+" & 0x20)>>5 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294967232;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "rs1_idx = "+toString(rs1)+" + 8;\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X[rs1_idx]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X[rs1_idx] = ((etiss_int64)cast_0 & imm_extended);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsub_s_rd_frs1_frs2(ISA32_RISCV64, "fsub.s",(uint32_t) 0x8000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsub.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 choose1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fsub_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], choose1);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsub_s(frs1, frs2, choose1);\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_d_rd_frs1(ISA32_RISCV64, "fcvt.s.d",(uint32_t) 0x40100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "res = fconv_d2f(((RISCV64*)cpu)->F["+toString(rs1)+"], ("+toString(rm)+" & 0xff));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition bgeu_rs1_rs2_imm(ISA32_RISCV64, "bgeu",(uint32_t) 0x7063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bgeu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] >= *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
etiss::instr::InstructionGroup ISA16_RISCV64("ISA16_RISCV64", 16)
static InstructionDefinition bge_rs1_rs2_imm(ISA32_RISCV64, "bge",(uint32_t) 0x5063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bge\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 >= (etiss_int64)cast_0)\n" "{\n" "etiss_int64 cast_2 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "choose1 = (etiss_int64)cast_2 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_slli_rs1_shamt(ISA16_RISCV64, "c.slli",(uint16_t) 0x2,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_5(12, 12);etiss_uint64 shamt_5=R_shamt_5.read(ba);shamt+=shamt_5<< 5;static BitArrayRange R_shamt_0(6, 2);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.slli\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rs1)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rs1)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] << "+toString(shamt)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 cpuTime_ps
simulation time of cpu
etiss::Plugin * newTimer(ETISS_CPU *cpu)
create a simple default timer implementaion instance for this architecture.
virtual unsigned getMaximumInstructionSizeInBytes()
virtual void resetCPU(ETISS_CPU *cpu, etiss::uint64 *startpointer)
reset cpu (structure)
static InstructionDefinition or_rd_rs1_rs2(ISA32_RISCV64, "or",(uint32_t) 0x6033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//or\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] | *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lbu_rd_imm_rs1_(ISA32_RISCV64, "lbu",(uint32_t) 0x4003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lbu\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint8 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)MEM_offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition beq_rs1_rs2_imm(ISA32_RISCV64, "beq",(uint32_t) 0x63,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//beq\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] == *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_nop_(ISA16_RISCV64, "c.nop",(uint16_t) 0x1,(uint16_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.nop\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_lui_rd_imm(ISA16_RISCV64, "c.lui",(uint16_t) 0x6001,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 imm=0;static BitArrayRange R_imm_17(12, 12);etiss_uint64 imm_17=R_imm_17.read(ba);imm+=imm_17<< 17;static BitArrayRange R_imm_12(6, 2);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.lui\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x20000)>>17 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294705152;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "if(imm_extended == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition lb_rd_imm_rs1_(ISA32_RISCV64, "lb",(uint32_t) 0x3,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lb\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint8 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,1);\n" "etiss_int8 cast_1 = MEM_offs; \n" "if((etiss_int8)((etiss_uint8)cast_1 - 0x80) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint8)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sh_rs2_imm_rs1_(ISA32_RISCV64, "sh",(uint32_t) 0x1023,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sh\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint16 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,2);\n" "if((offs + 2 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fmadd_d_rd_frs1_frs2_frs3(ISA32_RISCV64, "fmadd.d",(uint32_t) 0x2000043,(uint32_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rs3=0;static BitArrayRange R_rs3_0(31, 27);etiss_uint64 rs3_0=R_rs3_0.read(ba);rs3+=rs3_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmadd.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmadd_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs3)+"] & 0xffffffffffffffff), (etiss_uint64)0, choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_lu_s_rd_frs1(ISA32_RISCV64, "fcvt.lu.s",(uint32_t) 0xc0300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.lu.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_uint32 flags = 0;\n" "res = fcvt_32_64(unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]), (etiss_uint32)1, ("+toString(rm)+" & 0xff));\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)res;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
std::set< std::string > headers_
static InstructionDefinition bltu_rs1_rs2_imm(ISA32_RISCV64, "bltu",(uint32_t) 0x6063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//bltu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if(*((RISCV64*)cpu)->X["+toString(rs1)+"] < *((RISCV64*)cpu)->X["+toString(rs2)+"])\n" "{\n" "etiss_int64 cast_0 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "choose1 = (etiss_int64)cast_0 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_lu_d_rd_frs1(ISA32_RISCV64, "fcvt.lu.d",(uint32_t) 0xc2300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.lu.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int64 cast_0 = fcvt_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)1, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_srli_8_rs1_shamt(ISA16_RISCV64, "c.srli",(uint16_t) 0x8001,(uint16_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_5(12, 12);etiss_uint64 shamt_5=R_shamt_5.read(ba);shamt+=shamt_5<< 5;static BitArrayRange R_shamt_0(6, 2);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.srli\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rs1_idx = 0;\n" "rs1_idx = "+toString(rs1)+" + 8;\n" "*((RISCV64*)cpu)->X[rs1_idx] = (*((RISCV64*)cpu)->X[rs1_idx] >> "+toString(shamt)+");\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_jr_rs1(ISA16_RISCV64, "c.jr",(uint16_t) 0x8002,(uint16_t) 0xf07f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(11, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.jr\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "cpu->instructionPointer = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_sd_8_rs2_uimm_8_rs1_(ISA16_RISCV64, "c.sd",(uint16_t) 0xe000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.sd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+" + 8];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition ld_rd_imm_rs1_(ISA32_RISCV64, "ld",(uint32_t) 0x3003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_1 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fmul_d_rd_frs1_frs2(ISA32_RISCV64, "fmul.d",(uint32_t) 0x12000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmul.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fmul_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition sw_rs2_imm_rs1_(ISA32_RISCV64, "sw",(uint32_t) 0x2023,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_fsd_rs2_uimm_8_rs1_(ISA16_RISCV64, "c.fsd",(uint16_t) 0xa000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fsd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+" + 8] & 0xffffffffffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition srli_rd_rs1_shamt(ISA32_RISCV64, "srli",(uint32_t) 0x5013,(uint32_t) 0xfc00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 shamt=0;static BitArrayRange R_shamt_0(25, 20);etiss_uint64 shamt_0=R_shamt_0.read(ba);shamt+=shamt_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//srli\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (*((RISCV64*)cpu)->X["+toString(rs1)+"] >> "+toString(shamt)+");\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition mulhsu_rd_rs1_rs2(ISA32_RISCV64, "mulhsu",(uint32_t) 0x2002033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulhsu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = ((etiss_int64)cast_0 * (etiss_uint64)*((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)(res >> 64);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmax_d_rd_frs1_frs2(ISA32_RISCV64, "fmax.d",(uint32_t) 0x2a001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmax.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "res = fsel_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmv_x_d_rd_frs1(ISA32_RISCV64, "fmv.x.d",(uint32_t) 0xe2000053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmv.x.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 cast_0 = ((RISCV64*)cpu)->F["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lh_rd_imm_rs1_(ISA32_RISCV64, "lh",(uint32_t) 0x1003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lh\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint16 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n" "etiss_int16 cast_1 = MEM_offs; \n" "if((etiss_int16)((etiss_uint16)cast_1 - 0x8000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint16)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
void append(const CodePart &part, CodePart::TYPE type)
static InstructionDefinition sra_rd_rs1_rs2(ISA32_RISCV64, "sra",(uint32_t) 0x40005033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sra\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 >> (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 64 - 1));\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fld_rd_imm_rs1_(ISA32_RISCV64, "fld",(uint32_t) 0x3007,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "res = MEM_offs;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sraw_rd_rs1_rs2(ISA32_RISCV64, "sraw",(uint32_t) 0x4000503b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sraw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 sh_val = 0;\n" "etiss_uint32 count = 0;\n" "etiss_int32 mask = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "mask = 31;\n" "count = ((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) & mask);\n" "etiss_int64 cast_0 = (*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "sh_val = ((etiss_int32)cast_0 >> count);\n" "etiss_int32 cast_1 = sh_val; \n" "if((etiss_int32)((etiss_uint32)cast_1 - 0x80000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint32)cast_1 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_1;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsw_rs2_imm_xrs1_(ISA32_RISCV64, "fsw",(uint32_t) 0x2027,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsw\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition ebreak_(ISA32_RISCV64, "ebreak",(uint32_t) 0x100073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//ebreak\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "return ETISS_RETURNCODE_CPUFINISHED; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoswap_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoswap.w",(uint32_t) 0x800202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoswap.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
unsigned short int uint16_t
static InstructionDefinition mulw_rd_rs1_rs2(ISA32_RISCV64, "mulw",(uint32_t) 0x200003b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) * (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
__DEVICE__ void * memset(void *__a, int __b, size_t __c)
static InstructionDefinition c_and_8_rd_8_rs2(ISA16_RISCV64, "c.and",(uint16_t) 0x8c61,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.and\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int8 rd_idx = 0;\n" "rd_idx = "+toString(rd)+" + 8;\n" "*((RISCV64*)cpu)->X[rd_idx] = (*((RISCV64*)cpu)->X[rd_idx] & *((RISCV64*)cpu)->X["+toString(rs2)+" + 8]);\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
virtual void initCodeBlock(etiss::CodeBlock &cb) const
called before instructions are translated for the code block
static InstructionDefinition divuw_rd_rs1_rs2(ISA32_RISCV64, "divuw",(uint32_t) 0x200503b,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//divuw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(rd)+" != 0)\n" "{\n" "if((*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff) != 0)\n" "{\n" "etiss_int64 cast_0 = ((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff) / (*((RISCV64*)cpu)->X["+toString(rs2)+"] & 0xffffffff)); \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "else\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = - 1;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
unsigned long long int uint64_t
const char * resources[ETISS_MAX_RESOURCES]
names of resources
static InstructionDefinition flt_s_rd_frs1_frs2(ISA32_RISCV64, "flt.s",(uint32_t) 0xa0001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//flt.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)2);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)2);\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = fcmp_s((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffff), (etiss_uint32)2);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomax_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomax.w",(uint32_t) 0xa000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomax.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res1; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 < (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition dii_(ISA16_RISCV64, "dii",(uint16_t) 0x0,(uint16_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//dii\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition mulh_rd_rs1_rs2(ISA32_RISCV64, "mulh",(uint32_t) 0x2001033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//mulh\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 res = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "res = ((etiss_int64)cast_1 * (etiss_int64)cast_0);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)(res >> 64);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fle_d_rd_frs1_frs2(ISA32_RISCV64, "fle.d",(uint32_t) 0xa2000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fle.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)1);\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsub_d_rd_frs1_frs2(ISA32_RISCV64, "fsub.d",(uint32_t) 0xa000053,(uint32_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsub.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 choose1 = 0;\n" "if("+toString(rm)+" < 7)\n" "{\n" "choose1 = ("+toString(rm)+" & 0xff);\n" "}\n" "else\n" "{\n" "choose1 = (((RISCV64*)cpu)->FCSR & 0xff);\n" "}\n" "res = fsub_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), choose1);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_fld_rd_uimm_8_rs1_(ISA16_RISCV64, "c.fld",(uint16_t) 0x2000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "res = MEM_offs;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+" + 8] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+" + 8] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss::mm::MMU * newMMU(ETISS_CPU *cpu)
It is an interface to instanciate a Memory Management Unit.
static InstructionDefinition c_fldsp_rd_uimm_x2_(ISA16_RISCV64, "c.fldsp",(uint16_t) 0x2002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 uimm=0;static BitArrayRange R_uimm_5(12, 12);etiss_uint64 uimm_5=R_uimm_5.read(ba);uimm+=uimm_5<< 5;static BitArrayRange R_uimm_3(6, 5);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(4, 2);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.fldsp\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "offs = *((RISCV64*)cpu)->X[2] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "res = MEM_offs;\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition sret_(ISA32_RISCV64, "sret",(uint32_t) 0x10200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//sret\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "((RISCV64*)cpu)->CSR[3088] = (((RISCV64*)cpu)->CSR[256] & 0x100)>>8;\n" "((RISCV64*)cpu)->CSR[256] ^= (((RISCV64*)cpu)->CSR[256] & 0x100);\n" "((RISCV64*)cpu)->CSR[256] ^= ((etiss_uint32)((((RISCV64*)cpu)->CSR[256] & 0x20)>>4)) ^ (((RISCV64*)cpu)->CSR[256] & 0x2);\n" "cpu->instructionPointer = ((RISCV64*)cpu)->CSR[321];\n" "((RISCV64*)cpu)->CSR[768]= ((RISCV64*)cpu)->CSR[256];\n" "((RISCV64*)cpu)->CSR[0]=((RISCV64*)cpu)->CSR[256];\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
static InstructionDefinition andi_rd_rs1_imm(ISA32_RISCV64, "andi",(uint32_t) 0x7013,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//andi\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = ((etiss_int64)cast_0 & imm_extended);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition lhu_rd_imm_rs1_(ISA32_RISCV64, "lhu",(uint32_t) 0x5003,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_int64 imm=0;static BitArrayRange R_imm_0(31, 20);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lhu\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint16 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,2);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)MEM_offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoswap_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoswap.d",(uint32_t) 0x800302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoswap.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "}\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 cpuCycleTime_ps
frequency of the cpu. use to allign e.g. memory delays
static InstructionDefinition c_ld_8_rd_uimm_8_rs1_(ISA16_RISCV64, "c.ld",(uint16_t) 0x6000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(9, 7);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 uimm=0;static BitArrayRange R_uimm_3(12, 10);etiss_uint64 uimm_3=R_uimm_3.read(ba);uimm+=uimm_3<< 3;static BitArrayRange R_uimm_6(6, 5);etiss_uint64 uimm_6=R_uimm_6.read(ba);uimm+=uimm_6<< 6;etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.ld\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+" + 8] + "+toString(uimm)+";\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrc_rd_csr_rs1(ISA32_RISCV64, "csrrc",(uint32_t) 0x3073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrc\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 xrs1 = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_uint64 xrd = 0;\n" "etiss_int64 writeMaskM = 0;\n" "xrd = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "xrs1 = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = xrd;\n" "}\n" "if("+toString(rs1)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd & ~xrs1) & writeMask))&0xffffffffffffffff&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (xrd & ~xrs1)&0xffffffffffffffff;\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
base plugin class that provides access to different plugin functions if present
static InstructionDefinition fsgnjx_d_rd_frs1_frs2(ISA32_RISCV64, "fsgnjx.d",(uint32_t) 0x22002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjx.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 ONE = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 MSK1 = 0;\n" "ONE = 1;\n" "MSK1 = (ONE << 63);\n" "res = ((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff) ^ ((((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff) & MSK1));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsgnjn_s_rd_frs1_frs2(ISA32_RISCV64, "fsgnjn.s",(uint32_t) 0x20001053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnjn.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((((RISCV64*)cpu)->F["+toString(rs1)+"] & 2147483647) | (~((RISCV64*)cpu)->F["+toString(rs2)+"] & -2147483648))&0xffffffffffffffff;\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "res = ((frs1 & 2147483647) | (~frs2 & -2147483648))&0xffffffff;\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fmin_d_rd_frs1_frs2(ISA32_RISCV64, "fmin.d",(uint32_t) 0x2a000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fmin.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 upper = 0;\n" "etiss_uint32 flags = 0;\n" "res = fsel_d((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff), (etiss_uint32)0);\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition amomin_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amomin.w",(uint32_t) 0x8000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amomin.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "etiss_uint64 choose1 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "etiss_int64 cast_2 = res1; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "if((etiss_int64)cast_2 > (etiss_int64)cast_1)\n" "{\n" "choose1 = *((RISCV64*)cpu)->X["+toString(rs2)+"];\n" "}\n" "else\n" "{\n" "choose1 = res1;\n" "}\n" "res2 = choose1;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition lr_d_rd_rs1(ISA32_RISCV64, "lr.d",(uint32_t) 0x1000302f,(uint32_t) 0xf9f0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//lr.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "((RISCV64*)cpu)->RES = offs;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition csrrs_rd_csr_rs1(ISA32_RISCV64, "csrrs",(uint32_t) 0x2073,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 csr=0;static BitArrayRange R_csr_0(31, 20);etiss_uint64 csr_0=R_csr_0.read(ba);csr+=csr_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//csrrs\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 xrs1 = 0;\n" "etiss_int64 mAddr = 0;\n" "etiss_int64 writeMask = 0;\n" "etiss_int64 writeMaskU = 0;\n" "etiss_int64 sAddr = 0;\n" "etiss_int64 writeMaskS = 0;\n" "etiss_int64 uAddr = 0;\n" "etiss_uint64 xrd = 0;\n" "etiss_int64 writeMaskM = 0;\n" "xrd = ((RISCV64*)cpu)->CSR["+toString(csr)+"];\n" "xrs1 = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = xrd;\n" "}\n" "if("+toString(rs1)+" != 0)\n" "{\n" "if((("+toString(csr)+" == 0) || ("+toString(csr)+" == 256)) || ("+toString(csr)+" == 768))\n" "{\n" "uAddr = 0;\n" "sAddr = 256;\n" "mAddr = 768;\n" "writeMaskM = -9223372036846388805;\n" "writeMaskS = -9223372036853866189;\n" "writeMaskU = -9223372036853866479;\n" "}\n" "if((("+toString(csr)+" == 68) || ("+toString(csr)+" == 324)) || ("+toString(csr)+" == 836))\n" "{\n" "uAddr = 68;\n" "sAddr = 324;\n" "mAddr = 836;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if((("+toString(csr)+" == 4) || ("+toString(csr)+" == 260)) || ("+toString(csr)+" == 772))\n" "{\n" "uAddr = 4;\n" "sAddr = 260;\n" "mAddr = 772;\n" "writeMaskM = 3003;\n" "writeMaskS = 819;\n" "writeMaskU = 273;\n" "}\n" "if(uAddr != sAddr)\n" "{\n" "if(((RISCV64*)cpu)->CSR[3088] == 3)\n" "{\n" "writeMask = writeMaskM;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 1)\n" "{\n" "writeMask = writeMaskS;\n" "}\n" "if(((RISCV64*)cpu)->CSR[3088] == 0)\n" "{\n" "writeMask = writeMaskU;\n" "}\n" "((RISCV64*)cpu)->CSR[uAddr] = ((((RISCV64*)cpu)->CSR[uAddr] & ~writeMask) | ((xrd | xrs1) & writeMask))&0xffffffffffffffff;\n" "((RISCV64*)cpu)->CSR[sAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "((RISCV64*)cpu)->CSR[mAddr] = ((RISCV64*)cpu)->CSR[uAddr];\n" "}\n" "else\n" "{\n" "((RISCV64*)cpu)->CSR["+toString(csr)+"] = (xrd | xrs1);\n" "}\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_s_wu_rd_rs1(ISA32_RISCV64, "fcvt.s.wu",(uint32_t) 0xd0100053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.s.wu\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "etiss_int64 upper = 0;\n" "if(64 == 32)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "}\n" "else\n" "{\n" "res = fcvt_s((*((RISCV64*)cpu)->X["+toString(rs1)+"] & 0xffffffff), (etiss_uint32)3, ("+toString(rm)+" & 0xff));\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 32) | (etiss_uint64)res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fclass_s_rd_frs1(ISA32_RISCV64, "fclass.s",(uint32_t) 0xe0001053,(uint32_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fclass.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = fclass_s(unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]));\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition fsgnj_d_rd_frs1_frs2(ISA32_RISCV64, "fsgnj.d",(uint32_t) 0x22000053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsgnj.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 res = 0;\n" "etiss_int64 ONE = 0;\n" "etiss_int64 upper = 0;\n" "etiss_int64 MSK1 = 0;\n" "etiss_int64 MSK2 = 0;\n" "ONE = 1;\n" "MSK1 = (ONE << 63);\n" "MSK2 = MSK1 - 1;\n" "res = (((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff) & MSK2) | ((((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff) & MSK1));\n" "if(64 == 64)\n" "{\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = res;\n" "}\n" "else\n" "{\n" "upper = - 1;\n" "((RISCV64*)cpu)->F["+toString(rd)+"] = ((upper << 64) | res);\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition c_addi4spn_rd_imm(ISA16_RISCV64, "c.addi4spn",(uint16_t) 0x0,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rd=0;static BitArrayRange R_rd_0(4, 2);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 imm=0;static BitArrayRange R_imm_4(12, 11);etiss_uint64 imm_4=R_imm_4.read(ba);imm+=imm_4<< 4;static BitArrayRange R_imm_6(10, 7);etiss_uint64 imm_6=R_imm_6.read(ba);imm+=imm_6<< 6;static BitArrayRange R_imm_2(6, 6);etiss_uint64 imm_2=R_imm_2.read(ba);imm+=imm_2<< 2;static BitArrayRange R_imm_3(5, 5);etiss_uint64 imm_3=R_imm_3.read(ba);imm+=imm_3<< 3;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[2], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.addi4spn\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "if("+toString(imm)+" == 0)\n" "{\n" "exception = ETISS_RETURNCODE_ILLEGALINSTRUCTION; \n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = *((RISCV64*)cpu)->X[2] + "+toString(imm)+";\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition amoxor_w_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoxor.w",(uint32_t) 0x2000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoxor.w\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res1 = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint32 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,4);\n" "etiss_int32 cast_0 = MEM_offs; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "res1 = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res1;\n" "}\n" "res2 = (res1 ^ *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,4);\n" "if((offs + 4 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition fcvt_w_d_rd_frs1(ISA32_RISCV64, "fcvt.w.d",(uint32_t) 0xc2000053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rm=0;static BitArrayRange R_rm_0(14, 12);etiss_uint64 rm_0=R_rm_0.read(ba);rm+=rm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fcvt.w.d\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_int32 cast_0 = fcvt_64_32((((RISCV64*)cpu)->F["+toString(rs1)+"] & 0xffffffffffffffff), (etiss_uint32)0, ("+toString(rm)+" & 0xff)); \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_int64)cast_0;\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition wfi_(ISA32_RISCV64, "wfi",(uint32_t) 0x10500073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//wfi\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "return ETISS_RETURNCODE_CPUFINISHED; \n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition blt_rs1_rs2_imm(ISA32_RISCV64, "blt",(uint32_t) 0x4063,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_12(31, 31);etiss_int64 imm_12=R_imm_12.read(ba);imm+=imm_12<< 12;static BitArrayRange R_imm_5(30, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_1(11, 8);etiss_int64 imm_1=R_imm_1.read(ba);imm+=imm_1<< 1;static BitArrayRange R_imm_11(7, 7);etiss_int64 imm_11=R_imm_11.read(ba);imm+=imm_11<< 11;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//blt\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 imm_extended = 0;\n" "etiss_int64 choose1 = 0;\n" "if(("+toString(imm)+" & 0x1000)>>12 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294959104;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs2)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "etiss_int64 cast_1 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_1 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_1 =0x0 + (etiss_uint64)cast_1 ;\n" "}\n" "if((etiss_int64)cast_1 < (etiss_int64)cast_0)\n" "{\n" "etiss_int64 cast_2 = "+toString((uint64_t) ic.current_address_)+"ULL ; \n" "if((etiss_int64)((etiss_uint64)cast_2 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_2 =0x0 + (etiss_uint64)cast_2 ;\n" "}\n" "choose1 = (etiss_int64)cast_2 + imm_extended;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "}\n" "else\n" "{\n" "choose1 = "+toString((uint64_t) ic.current_address_)+"ULL + 4;\n" "}\n" "cpu->instructionPointer = choose1;\n" "cpu->instructionPointer = (uint64_t)cpu->instructionPointer; \n" "return 0;\n" ;return true;}, 0, nullptr)
virtual const std::set< std::string > & getHeaders() const
required headers (RISCV64.h)
static InstructionDefinition amoand_d_rd_rs1_rs2_aqu_aq_rel_rl_(ISA32_RISCV64, "amoand.d",(uint32_t) 0x6000302f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 aq=0;static BitArrayRange R_aq_0(26, 26);etiss_uint64 aq_0=R_aq_0.read(ba);aq+=aq_0;etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;etiss_uint64 rl=0;static BitArrayRange R_rl_0(25, 25);etiss_uint64 rl_0=R_rl_0.read(ba);rl+=rl_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//amoand.d\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint64 offs = 0;\n" "etiss_int64 res = 0;\n" "etiss_uint64 res2 = 0;\n" "offs = *((RISCV64*)cpu)->X["+toString(rs1)+"];\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "exception = (*(system->dread))(system->handle,cpu,offs,tmpbuf,8);\n" "etiss_int64 cast_0 = MEM_offs; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "res = (etiss_int64)cast_0;\n" "if("+toString(rd)+" != 0)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = res;\n" "}\n" "res2 = (res & *((RISCV64*)cpu)->X["+toString(rs2)+"]);\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = res2;\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
etiss_uint64 cycles[ETISS_MAX_RESOURCES]
how many cycles in each resource (including waiting)
static InstructionDefinition fsd_rs2_imm_rs1_(ISA32_RISCV64, "fsd",(uint32_t) 0x3027,(uint32_t) 0x707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_int64 imm=0;static BitArrayRange R_imm_5(31, 25);etiss_int64 imm_5=R_imm_5.read(ba);imm+=imm_5<< 5;static BitArrayRange R_imm_0(11, 7);etiss_int64 imm_0=R_imm_0.read(ba);imm+=imm_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rs1], 64);partInit.getRegisterDependencies().add(reg_name[rs2], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//fsd\n")+"etiss_uint32 exception = 0;\n" "etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_int64 offs = 0;\n" "etiss_int64 imm_extended = 0;\n" "if(("+toString(imm)+" & 0x800)>>11 == 0)\n" "{\n" "imm_extended = 0;\n" "}\n" "else\n" "{\n" "imm_extended = 4294967295;\n" "imm_extended = (imm_extended << 32);\n" "imm_extended = imm_extended + 4294963200;\n" "}\n" "imm_extended = imm_extended + "+toString(imm)+";\n" "etiss_int64 cast_0 = *((RISCV64*)cpu)->X["+toString(rs1)+"]; \n" "if((etiss_int64)((etiss_uint64)cast_0 - 0x8000000000000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint64)cast_0 ;\n" "}\n" "offs = (etiss_int64)cast_0 + imm_extended;\n" "etiss_uint64 MEM_offs;\n" "tmpbuf = (etiss_uint8 *)&MEM_offs;\n" "MEM_offs = (((RISCV64*)cpu)->F["+toString(rs2)+"] & 0xffffffffffffffff);\n" "exception = (*(system->dwrite))(system->handle,cpu,offs,tmpbuf,8);\n" "if((offs + 8 > ((RISCV64*)cpu)->RES) && (offs < 8 + ((RISCV64*)cpu)->RES))\n" "{\n" "((RISCV64*)cpu)->RES = 0;\n" "}\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" "return exception;\n" ;return true;}, 0, nullptr)
static InstructionDefinition c_subw_8_rd_8_rd_8_rs2(ISA16_RISCV64, "c.subw",(uint16_t) 0x9c01,(uint16_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(4, 2);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(9, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getRegisterDependencies().add(reg_name[rd+8], 64);partInit.getRegisterDependencies().add(reg_name[rs2+8], 64);partInit.getAffectedRegisters().add(reg_name[rd+8], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//c.subw\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 res = 0;\n" "res = (*((RISCV64*)cpu)->X["+toString(rd)+" + 8] & 0xffffffff) - (*((RISCV64*)cpu)->X["+toString(rs2)+" + 8] & 0xffffffff);\n" "etiss_int32 cast_0 = res; \n" "if((etiss_int32)((etiss_uint32)cast_0 - 0x80000000) > 0x0)\n" "{\n" "cast_0 =0x0 + (etiss_uint32)cast_0 ;\n" "}\n" "*((RISCV64*)cpu)->X["+toString(rd)+" + 8] = (etiss_int64)cast_0;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+2))+"ULL; \n" ;return true;}, 0, nullptr)
static InstructionDefinition feq_s_rd_frs1_frs2(ISA32_RISCV64, "feq.s",(uint32_t) 0xa0002053,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint64 rs2=0;static BitArrayRange R_rs2_0(24, 20);etiss_uint64 rs2_0=R_rs2_0.read(ba);rs2+=rs2_0;etiss_uint64 rs1=0;static BitArrayRange R_rs1_0(19, 15);etiss_uint64 rs1_0=R_rs1_0.read(ba);rs1+=rs1_0;etiss_uint64 rd=0;static BitArrayRange R_rd_0(11, 7);etiss_uint64 rd_0=R_rd_0.read(ba);rd+=rd_0;CodePart &partInit=cs.append(CodePart::INITIALREQUIRED);partInit.getAffectedRegisters().add(reg_name[rd], 64);partInit.getAffectedRegisters().add("instructionPointer", 64);partInit.code()=std::string("//feq.s\n")+"etiss_uint32 temp = 0;\n" "etiss_uint8 * tmpbuf = (etiss_uint8 *)&temp;\n" "etiss_uint32 flags = 0;\n" "etiss_uint32 frs1 = 0;\n" "etiss_uint32 frs2 = 0;\n" "if(64 == 32)\n" "{\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(((RISCV64*)cpu)->F["+toString(rs1)+"], ((RISCV64*)cpu)->F["+toString(rs2)+"], (etiss_uint32)0);\n" "}\n" "else\n" "{\n" "frs1 = unbox_s(((RISCV64*)cpu)->F["+toString(rs1)+"]);\n" "frs2 = unbox_s(((RISCV64*)cpu)->F["+toString(rs2)+"]);\n" "*((RISCV64*)cpu)->X["+toString(rd)+"] = (etiss_uint64)fcmp_s(frs1, frs2, (etiss_uint32)0);\n" "}\n" "flags = fget_flags();\n" "((RISCV64*)cpu)->FCSR = (((RISCV64*)cpu)->FCSR & ~31) + (flags & 0x1f)&0xffffffff;\n" "cpu->instructionPointer = "+toString((uint64_t)(ic.current_address_+4))+"ULL; \n" ;return true;}, 0, nullptr)